Lines Matching refs:qman_offset
3555 u32 qman_offset; in gaudi_disable_clock_gating() local
3561 for (i = 0, qman_offset = 0 ; i < DMA_NUMBER_OF_CHANNELS ; i++) { in gaudi_disable_clock_gating()
3562 WREG32(mmDMA0_QM_CGM_CFG + qman_offset, 0); in gaudi_disable_clock_gating()
3563 WREG32(mmDMA0_QM_CGM_CFG1 + qman_offset, 0); in gaudi_disable_clock_gating()
3565 qman_offset += (mmDMA1_QM_CGM_CFG - mmDMA0_QM_CGM_CFG); in gaudi_disable_clock_gating()
3573 for (i = 0, qman_offset = 0 ; i < TPC_NUMBER_OF_ENGINES ; i++) { in gaudi_disable_clock_gating()
3574 WREG32(mmTPC0_QM_CGM_CFG + qman_offset, 0); in gaudi_disable_clock_gating()
3575 WREG32(mmTPC0_QM_CGM_CFG1 + qman_offset, 0); in gaudi_disable_clock_gating()
3577 qman_offset += (mmTPC1_QM_CGM_CFG - mmTPC0_QM_CGM_CFG); in gaudi_disable_clock_gating()
5814 u32 qman_offset; in gaudi_restore_qm_registers() local
5818 qman_offset = i * DMA_QMAN_OFFSET; in gaudi_restore_qm_registers()
5819 WREG32(mmDMA0_QM_ARB_CFG_0 + qman_offset, 0); in gaudi_restore_qm_registers()
5823 qman_offset = i * (mmMME2_QM_BASE - mmMME0_QM_BASE); in gaudi_restore_qm_registers()
5824 WREG32(mmMME0_QM_ARB_CFG_0 + qman_offset, 0); in gaudi_restore_qm_registers()
5828 qman_offset = i * TPC_QMAN_OFFSET; in gaudi_restore_qm_registers()
5829 WREG32(mmTPC0_QM_ARB_CFG_0 + qman_offset, 0); in gaudi_restore_qm_registers()
5833 qman_offset = (i >> 1) * NIC_MACRO_QMAN_OFFSET + in gaudi_restore_qm_registers()
5835 WREG32(mmNIC0_QM0_ARB_CFG_0 + qman_offset, 0); in gaudi_restore_qm_registers()