Lines Matching refs:IA32_EBP
103 #define IA32_EBP (0x5) macro
217 EMIT3(0x89, add_2reg(0x40, IA32_EBP, IA32_EAX), in emit_ia32_mov_i()
220 EMIT3_off32(0xC7, add_1reg(0x40, IA32_EBP), in emit_ia32_mov_i()
243 EMIT3(0x8B, add_2reg(0x40, IA32_EBP, IA32_EAX), STACK_VAR(src)); in emit_ia32_mov_r()
246 EMIT3(0x89, add_2reg(0x40, IA32_EBP, sreg), STACK_VAR(dst)); in emit_ia32_mov_r()
294 EMIT3(0x8B, add_2reg(0x40, IA32_EBP, IA32_ECX), STACK_VAR(src)); in emit_ia32_mul_r()
298 EMIT3(0x8B, add_2reg(0x40, IA32_EBP, IA32_EAX), STACK_VAR(dst)); in emit_ia32_mul_r()
308 EMIT3(0x89, add_2reg(0x40, IA32_EBP, IA32_EAX), in emit_ia32_mul_r()
327 EMIT3(0x8B, add_2reg(0x40, IA32_EBP, IA32_EAX), in emit_ia32_to_le_r64()
329 EMIT3(0x8B, add_2reg(0x40, IA32_EBP, IA32_EDX), in emit_ia32_to_le_r64()
356 EMIT3(0x89, add_2reg(0x40, IA32_EBP, dreg_lo), in emit_ia32_to_le_r64()
359 EMIT3(0x89, add_2reg(0x40, IA32_EBP, dreg_hi), in emit_ia32_to_le_r64()
375 EMIT3(0x8B, add_2reg(0x40, IA32_EBP, IA32_EAX), in emit_ia32_to_be_r64()
377 EMIT3(0x8B, add_2reg(0x40, IA32_EBP, IA32_EDX), in emit_ia32_to_be_r64()
422 EMIT3(0x89, add_2reg(0x40, IA32_EBP, dreg_lo), in emit_ia32_to_be_r64()
425 EMIT3(0x89, add_2reg(0x40, IA32_EBP, dreg_hi), in emit_ia32_to_be_r64()
443 EMIT3(0x8B, add_2reg(0x40, IA32_EBP, IA32_ECX), in emit_ia32_div_mod_r()
451 EMIT3(0x8B, add_2reg(0x40, IA32_EBP, IA32_EAX), in emit_ia32_div_mod_r()
464 EMIT3(0x89, add_2reg(0x40, IA32_EBP, IA32_EDX), in emit_ia32_div_mod_r()
470 EMIT3(0x89, add_2reg(0x40, IA32_EBP, IA32_EAX), in emit_ia32_div_mod_r()
492 EMIT3(0x8B, add_2reg(0x40, IA32_EBP, IA32_EAX), STACK_VAR(dst)); in emit_ia32_shift_r()
496 EMIT3(0x8B, add_2reg(0x40, IA32_EBP, IA32_ECX), STACK_VAR(src)); in emit_ia32_shift_r()
515 EMIT3(0x89, add_2reg(0x40, IA32_EBP, dreg), STACK_VAR(dst)); in emit_ia32_shift_r()
534 EMIT3(0x8B, add_2reg(0x40, IA32_EBP, IA32_EAX), STACK_VAR(src)); in emit_ia32_alu_r()
538 EMIT3(0x8B, add_2reg(0x40, IA32_EBP, IA32_EDX), STACK_VAR(dst)); in emit_ia32_alu_r()
571 EMIT3(0x89, add_2reg(0x40, IA32_EBP, dreg), in emit_ia32_alu_r()
608 EMIT3(0x8B, add_2reg(0x40, IA32_EBP, IA32_EAX), STACK_VAR(dst)); in emit_ia32_alu_i()
671 EMIT3(0x89, add_2reg(0x40, IA32_EBP, dreg), in emit_ia32_alu_i()
706 EMIT3(0x8B, add_2reg(0x40, IA32_EBP, IA32_EAX), in emit_ia32_neg64()
708 EMIT3(0x8B, add_2reg(0x40, IA32_EBP, IA32_EDX), in emit_ia32_neg64()
721 EMIT3(0x89, add_2reg(0x40, IA32_EBP, dreg_lo), in emit_ia32_neg64()
724 EMIT3(0x89, add_2reg(0x40, IA32_EBP, dreg_hi), in emit_ia32_neg64()
740 EMIT3(0x8B, add_2reg(0x40, IA32_EBP, IA32_EAX), in emit_ia32_lsh_r64()
742 EMIT3(0x8B, add_2reg(0x40, IA32_EBP, IA32_EDX), in emit_ia32_lsh_r64()
748 EMIT3(0x8B, add_2reg(0x40, IA32_EBP, IA32_ECX), in emit_ia32_lsh_r64()
773 EMIT3(0x89, add_2reg(0x40, IA32_EBP, dreg_lo), in emit_ia32_lsh_r64()
776 EMIT3(0x89, add_2reg(0x40, IA32_EBP, dreg_hi), in emit_ia32_lsh_r64()
793 EMIT3(0x8B, add_2reg(0x40, IA32_EBP, IA32_EAX), in emit_ia32_arsh_r64()
795 EMIT3(0x8B, add_2reg(0x40, IA32_EBP, IA32_EDX), in emit_ia32_arsh_r64()
801 EMIT3(0x8B, add_2reg(0x40, IA32_EBP, IA32_ECX), in emit_ia32_arsh_r64()
826 EMIT3(0x89, add_2reg(0x40, IA32_EBP, dreg_lo), in emit_ia32_arsh_r64()
829 EMIT3(0x89, add_2reg(0x40, IA32_EBP, dreg_hi), in emit_ia32_arsh_r64()
846 EMIT3(0x8B, add_2reg(0x40, IA32_EBP, IA32_EAX), in emit_ia32_rsh_r64()
848 EMIT3(0x8B, add_2reg(0x40, IA32_EBP, IA32_EDX), in emit_ia32_rsh_r64()
854 EMIT3(0x8B, add_2reg(0x40, IA32_EBP, IA32_ECX), in emit_ia32_rsh_r64()
879 EMIT3(0x89, add_2reg(0x40, IA32_EBP, dreg_lo), in emit_ia32_rsh_r64()
882 EMIT3(0x89, add_2reg(0x40, IA32_EBP, dreg_hi), in emit_ia32_rsh_r64()
899 EMIT3(0x8B, add_2reg(0x40, IA32_EBP, IA32_EAX), in emit_ia32_lsh_i64()
901 EMIT3(0x8B, add_2reg(0x40, IA32_EBP, IA32_EDX), in emit_ia32_lsh_i64()
928 EMIT3(0x89, add_2reg(0x40, IA32_EBP, dreg_lo), in emit_ia32_lsh_i64()
931 EMIT3(0x89, add_2reg(0x40, IA32_EBP, dreg_hi), in emit_ia32_lsh_i64()
947 EMIT3(0x8B, add_2reg(0x40, IA32_EBP, IA32_EAX), in emit_ia32_rsh_i64()
949 EMIT3(0x8B, add_2reg(0x40, IA32_EBP, IA32_EDX), in emit_ia32_rsh_i64()
977 EMIT3(0x89, add_2reg(0x40, IA32_EBP, dreg_lo), in emit_ia32_rsh_i64()
980 EMIT3(0x89, add_2reg(0x40, IA32_EBP, dreg_hi), in emit_ia32_rsh_i64()
996 EMIT3(0x8B, add_2reg(0x40, IA32_EBP, IA32_EAX), in emit_ia32_arsh_i64()
998 EMIT3(0x8B, add_2reg(0x40, IA32_EBP, IA32_EDX), in emit_ia32_arsh_i64()
1026 EMIT3(0x89, add_2reg(0x40, IA32_EBP, dreg_lo), in emit_ia32_arsh_i64()
1029 EMIT3(0x89, add_2reg(0x40, IA32_EBP, dreg_hi), in emit_ia32_arsh_i64()
1043 EMIT3(0x8B, add_2reg(0x40, IA32_EBP, IA32_EAX), in emit_ia32_mul_r64()
1051 EMIT3(0xF7, add_1reg(0x60, IA32_EBP), STACK_VAR(src_lo)); in emit_ia32_mul_r64()
1061 EMIT3(0x8B, add_2reg(0x40, IA32_EBP, IA32_EAX), in emit_ia32_mul_r64()
1069 EMIT3(0xF7, add_1reg(0x60, IA32_EBP), STACK_VAR(src_hi)); in emit_ia32_mul_r64()
1079 EMIT3(0x8B, add_2reg(0x40, IA32_EBP, IA32_EAX), in emit_ia32_mul_r64()
1087 EMIT3(0xF7, add_1reg(0x60, IA32_EBP), STACK_VAR(src_lo)); in emit_ia32_mul_r64()
1097 EMIT3(0x89, add_2reg(0x40, IA32_EBP, IA32_EAX), in emit_ia32_mul_r64()
1100 EMIT3(0x89, add_2reg(0x40, IA32_EBP, IA32_ECX), in emit_ia32_mul_r64()
1124 EMIT3(0xF7, add_1reg(0x60, IA32_EBP), STACK_VAR(dst_hi)); in emit_ia32_mul_i64()
1136 EMIT3(0xF7, add_1reg(0x60, IA32_EBP), STACK_VAR(dst_lo)); in emit_ia32_mul_i64()
1147 EMIT3(0xF7, add_1reg(0x60, IA32_EBP), STACK_VAR(dst_lo)); in emit_ia32_mul_i64()
1157 EMIT3(0x89, add_2reg(0x40, IA32_EBP, IA32_EAX), in emit_ia32_mul_i64()
1160 EMIT3(0x89, add_2reg(0x40, IA32_EBP, IA32_ECX), in emit_ia32_mul_i64()
1223 EMIT3(0x83, add_1reg(0xE8, IA32_EBP), SCRATCH_SIZE + 12); in emit_prologue()
1228 EMIT3(0x89, add_2reg(0x40, IA32_EBP, IA32_EBP), STACK_VAR(fplo)); in emit_prologue()
1229 EMIT3(0x89, add_2reg(0x40, IA32_EBP, IA32_EBX), STACK_VAR(fphi)); in emit_prologue()
1233 EMIT3(0x89, add_2reg(0x40, IA32_EBP, IA32_EAX), STACK_VAR(r1[0])); in emit_prologue()
1234 EMIT3(0x89, add_2reg(0x40, IA32_EBP, IA32_EBX), STACK_VAR(r1[1])); in emit_prologue()
1237 EMIT3(0x89, add_2reg(0x40, IA32_EBP, IA32_EBX), STACK_VAR(tcc[0])); in emit_prologue()
1238 EMIT3(0x89, add_2reg(0x40, IA32_EBP, IA32_EBX), STACK_VAR(tcc[1])); in emit_prologue()
1252 EMIT3(0x8B, add_2reg(0x40, IA32_EBP, IA32_EAX), STACK_VAR(r0[0])); in emit_epilogue()
1254 EMIT3(0x8B, add_2reg(0x40, IA32_EBP, IA32_EDX), STACK_VAR(r0[1])); in emit_epilogue()
1257 EMIT3(0x83, add_1reg(0xC0, IA32_EBP), SCRATCH_SIZE + 12); in emit_epilogue()
1260 EMIT3(0x8B, add_2reg(0x40, IA32_EBP, IA32_EBX), -12); in emit_epilogue()
1262 EMIT3(0x8B, add_2reg(0x40, IA32_EBP, IA32_ESI), -8); in emit_epilogue()
1264 EMIT3(0x8B, add_2reg(0x40, IA32_EBP, IA32_EDI), -4); in emit_epilogue()
1315 EMIT3(0x8B, add_2reg(0x40, IA32_EBP, IA32_EAX), STACK_VAR(r2[0])); in emit_bpf_tail_call()
1317 EMIT3(0x8B, add_2reg(0x40, IA32_EBP, IA32_EDX), STACK_VAR(r3[0])); in emit_bpf_tail_call()
1331 EMIT3(0x8B, add_2reg(0x40, IA32_EBP, IA32_ECX), STACK_VAR(tcc[0])); in emit_bpf_tail_call()
1332 EMIT3(0x8B, add_2reg(0x40, IA32_EBP, IA32_EBX), STACK_VAR(tcc[1])); in emit_bpf_tail_call()
1349 EMIT3(0x89, add_2reg(0x40, IA32_EBP, IA32_ECX), STACK_VAR(tcc[0])); in emit_bpf_tail_call()
1351 EMIT3(0x89, add_2reg(0x40, IA32_EBP, IA32_EBX), STACK_VAR(tcc[1])); in emit_bpf_tail_call()
1374 EMIT3(0x8B, add_2reg(0x40, IA32_EBP, IA32_EAX), STACK_VAR(r1[0])); in emit_bpf_tail_call()
1397 EMIT3(0x8B, add_2reg(0x40, IA32_EBP, IA32_ECX), STACK_VAR(src_hi)); in emit_push_r64()
1402 EMIT3(0x8B, add_2reg(0x40, IA32_EBP, IA32_ECX), STACK_VAR(src_lo)); in emit_push_r64()
1415 EMIT3(0x8B, add_2reg(0x40, IA32_EBP, IA32_ECX), STACK_VAR(src_lo)); in emit_push_r32()
1611 EMIT3(0x8B, add_2reg(0x40, IA32_EBP, *cur_arg_reg++), in emit_kfunc_call()
1615 EMIT3(0x8B, add_2reg(0x40, IA32_EBP, *cur_arg_reg++), in emit_kfunc_call()
1642 EMIT3(0x89, add_2reg(0x40, IA32_EBP, IA32_EAX), in emit_kfunc_call()
1647 EMIT3(0x89, add_2reg(0x40, IA32_EBP, IA32_EDX), in emit_kfunc_call()
1918 EMIT3(0x8B, add_2reg(0x40, IA32_EBP, IA32_EAX), in do_jit()
1958 EMIT3(0x8B, add_2reg(0x40, IA32_EBP, IA32_EAX), in do_jit()
1966 EMIT3(0x8B, add_2reg(0x40, IA32_EBP, IA32_EDX), in do_jit()
1992 EMIT3(0x8B, add_2reg(0x40, IA32_EBP, in do_jit()
2019 EMIT3(0x8B, add_2reg(0x40, IA32_EBP, IA32_EAX), in do_jit()
2044 EMIT3(0x89, add_2reg(0x40, IA32_EBP, IA32_EDX), in do_jit()
2056 EMIT3(0xC7, add_1reg(0x40, IA32_EBP), in do_jit()
2071 add_2reg(0x40, IA32_EBP, in do_jit()
2116 EMIT3(0x8B, add_2reg(0x40, IA32_EBP, IA32_EAX), in do_jit()
2119 EMIT3(0x8B, add_2reg(0x40, IA32_EBP, IA32_EDX), in do_jit()
2130 EMIT3(0x89, add_2reg(0x40, IA32_EBP, IA32_EAX), in do_jit()
2133 EMIT3(0x89, add_2reg(0x40, IA32_EBP, IA32_EDX), in do_jit()
2168 EMIT3(0x8B, add_2reg(0x40, IA32_EBP, IA32_EAX), in do_jit()
2172 add_2reg(0x40, IA32_EBP, in do_jit()
2178 EMIT3(0x8B, add_2reg(0x40, IA32_EBP, IA32_ECX), in do_jit()
2182 add_2reg(0x40, IA32_EBP, in do_jit()
2206 EMIT3(0x8B, add_2reg(0x40, IA32_EBP, IA32_EAX), in do_jit()
2209 add_2reg(0x40, IA32_EBP, in do_jit()
2215 EMIT3(0x8B, add_2reg(0x40, IA32_EBP, IA32_ECX), in do_jit()
2218 add_2reg(0x40, IA32_EBP, in do_jit()
2239 EMIT3(0x8B, add_2reg(0x40, IA32_EBP, IA32_EAX), in do_jit()
2243 add_2reg(0x40, IA32_EBP, in do_jit()
2256 EMIT3(0x8B, add_2reg(0x40, IA32_EBP, IA32_ECX), in do_jit()
2260 add_2reg(0x40, IA32_EBP, in do_jit()
2284 EMIT3(0x8B, add_2reg(0x40, IA32_EBP, IA32_EAX), in do_jit()
2288 add_2reg(0x40, IA32_EBP, in do_jit()
2340 EMIT3(0x8B, add_2reg(0x40, IA32_EBP, IA32_EAX), in do_jit()
2344 add_2reg(0x40, IA32_EBP, in do_jit()
2387 EMIT3(0x8B, add_2reg(0x40, IA32_EBP, IA32_EAX), in do_jit()
2390 add_2reg(0x40, IA32_EBP, in do_jit()