Lines Matching refs:IA32_EAX
97 #define IA32_EAX (0x0) macro
215 EMIT2(0x33, add_2reg(0xC0, IA32_EAX, IA32_EAX)); in emit_ia32_mov_i()
217 EMIT3(0x89, add_2reg(0x40, IA32_EBP, IA32_EAX), in emit_ia32_mov_i()
239 u8 sreg = sstk ? IA32_EAX : src; in emit_ia32_mov_r()
243 EMIT3(0x8B, add_2reg(0x40, IA32_EBP, IA32_EAX), STACK_VAR(src)); in emit_ia32_mov_r()
298 EMIT3(0x8B, add_2reg(0x40, IA32_EBP, IA32_EAX), STACK_VAR(dst)); in emit_ia32_mul_r()
301 EMIT2(0x8B, add_2reg(0xC0, dst, IA32_EAX)); in emit_ia32_mul_r()
308 EMIT3(0x89, add_2reg(0x40, IA32_EBP, IA32_EAX), in emit_ia32_mul_r()
312 EMIT2(0x89, add_2reg(0xC0, dst, IA32_EAX)); in emit_ia32_mul_r()
323 u8 dreg_lo = dstk ? IA32_EAX : dst_lo; in emit_ia32_to_le_r64()
327 EMIT3(0x8B, add_2reg(0x40, IA32_EBP, IA32_EAX), in emit_ia32_to_le_r64()
371 u8 dreg_lo = dstk ? IA32_EAX : dst_lo; in emit_ia32_to_be_r64()
375 EMIT3(0x8B, add_2reg(0x40, IA32_EBP, IA32_EAX), in emit_ia32_to_be_r64()
451 EMIT3(0x8B, add_2reg(0x40, IA32_EBP, IA32_EAX), in emit_ia32_div_mod_r()
455 EMIT2(0x8B, add_2reg(0xC0, dst, IA32_EAX)); in emit_ia32_div_mod_r()
470 EMIT3(0x89, add_2reg(0x40, IA32_EBP, IA32_EAX), in emit_ia32_div_mod_r()
473 EMIT2(0x89, add_2reg(0xC0, dst, IA32_EAX)); in emit_ia32_div_mod_r()
487 u8 dreg = dstk ? IA32_EAX : dst; in emit_ia32_shift_r()
492 EMIT3(0x8B, add_2reg(0x40, IA32_EBP, IA32_EAX), STACK_VAR(dst)); in emit_ia32_shift_r()
529 u8 sreg = sstk ? IA32_EAX : src; in emit_ia32_alu_r()
534 EMIT3(0x8B, add_2reg(0x40, IA32_EBP, IA32_EAX), STACK_VAR(src)); in emit_ia32_alu_r()
603 u8 dreg = dstk ? IA32_EAX : dst; in emit_ia32_alu_i()
608 EMIT3(0x8B, add_2reg(0x40, IA32_EBP, IA32_EAX), STACK_VAR(dst)); in emit_ia32_alu_i()
702 u8 dreg_lo = dstk ? IA32_EAX : dst_lo; in emit_ia32_neg64()
706 EMIT3(0x8B, add_2reg(0x40, IA32_EBP, IA32_EAX), in emit_ia32_neg64()
736 u8 dreg_lo = dstk ? IA32_EAX : dst_lo; in emit_ia32_lsh_r64()
740 EMIT3(0x8B, add_2reg(0x40, IA32_EBP, IA32_EAX), in emit_ia32_lsh_r64()
789 u8 dreg_lo = dstk ? IA32_EAX : dst_lo; in emit_ia32_arsh_r64()
793 EMIT3(0x8B, add_2reg(0x40, IA32_EBP, IA32_EAX), in emit_ia32_arsh_r64()
842 u8 dreg_lo = dstk ? IA32_EAX : dst_lo; in emit_ia32_rsh_r64()
846 EMIT3(0x8B, add_2reg(0x40, IA32_EBP, IA32_EAX), in emit_ia32_rsh_r64()
895 u8 dreg_lo = dstk ? IA32_EAX : dst_lo; in emit_ia32_lsh_i64()
899 EMIT3(0x8B, add_2reg(0x40, IA32_EBP, IA32_EAX), in emit_ia32_lsh_i64()
943 u8 dreg_lo = dstk ? IA32_EAX : dst_lo; in emit_ia32_rsh_i64()
947 EMIT3(0x8B, add_2reg(0x40, IA32_EBP, IA32_EAX), in emit_ia32_rsh_i64()
992 u8 dreg_lo = dstk ? IA32_EAX : dst_lo; in emit_ia32_arsh_i64()
996 EMIT3(0x8B, add_2reg(0x40, IA32_EBP, IA32_EAX), in emit_ia32_arsh_i64()
1043 EMIT3(0x8B, add_2reg(0x40, IA32_EBP, IA32_EAX), in emit_ia32_mul_r64()
1047 EMIT2(0x8B, add_2reg(0xC0, dst_hi, IA32_EAX)); in emit_ia32_mul_r64()
1057 EMIT2(0x89, add_2reg(0xC0, IA32_ECX, IA32_EAX)); in emit_ia32_mul_r64()
1061 EMIT3(0x8B, add_2reg(0x40, IA32_EBP, IA32_EAX), in emit_ia32_mul_r64()
1065 EMIT2(0x8B, add_2reg(0xC0, dst_lo, IA32_EAX)); in emit_ia32_mul_r64()
1075 EMIT2(0x01, add_2reg(0xC0, IA32_ECX, IA32_EAX)); in emit_ia32_mul_r64()
1079 EMIT3(0x8B, add_2reg(0x40, IA32_EBP, IA32_EAX), in emit_ia32_mul_r64()
1083 EMIT2(0x8B, add_2reg(0xC0, dst_lo, IA32_EAX)); in emit_ia32_mul_r64()
1097 EMIT3(0x89, add_2reg(0x40, IA32_EBP, IA32_EAX), in emit_ia32_mul_r64()
1104 EMIT2(0x89, add_2reg(0xC0, dst_lo, IA32_EAX)); in emit_ia32_mul_r64()
1121 EMIT2_off32(0xC7, add_1reg(0xC0, IA32_EAX), val); in emit_ia32_mul_i64()
1130 EMIT2(0x89, add_2reg(0xC0, IA32_ECX, IA32_EAX)); in emit_ia32_mul_i64()
1133 EMIT2_off32(0xC7, add_1reg(0xC0, IA32_EAX), hi); in emit_ia32_mul_i64()
1141 EMIT2(0x01, add_2reg(0xC0, IA32_ECX, IA32_EAX)); in emit_ia32_mul_i64()
1144 EMIT2_off32(0xC7, add_1reg(0xC0, IA32_EAX), val); in emit_ia32_mul_i64()
1157 EMIT3(0x89, add_2reg(0x40, IA32_EBP, IA32_EAX), in emit_ia32_mul_i64()
1164 EMIT2(0x89, add_2reg(0xC0, dst_lo, IA32_EAX)); in emit_ia32_mul_i64()
1233 EMIT3(0x89, add_2reg(0x40, IA32_EBP, IA32_EAX), STACK_VAR(r1[0])); in emit_prologue()
1252 EMIT3(0x8B, add_2reg(0x40, IA32_EBP, IA32_EAX), STACK_VAR(r0[0])); in emit_epilogue()
1315 EMIT3(0x8B, add_2reg(0x40, IA32_EBP, IA32_EAX), STACK_VAR(r2[0])); in emit_bpf_tail_call()
1320 EMIT3(0x39, add_2reg(0x40, IA32_EAX, IA32_EDX), in emit_bpf_tail_call()
1374 EMIT3(0x8B, add_2reg(0x40, IA32_EBP, IA32_EAX), STACK_VAR(r1[0])); in emit_bpf_tail_call()
1572 const u8 arg_regs[] = { IA32_EAX, IA32_EDX, IA32_ECX }; in emit_kfunc_call()
1642 EMIT3(0x89, add_2reg(0x40, IA32_EBP, IA32_EAX), in emit_kfunc_call()
1918 EMIT3(0x8B, add_2reg(0x40, IA32_EBP, IA32_EAX), in do_jit()
1922 EMIT2(0x8B, add_2reg(0xC0, dst_lo, IA32_EAX)); in do_jit()
1935 EMIT2(add_1reg(0x40, IA32_EAX), insn->off); in do_jit()
1937 EMIT1_off32(add_1reg(0x80, IA32_EAX), in do_jit()
1945 EMIT2_off32(0xC7, add_1reg(0x80, IA32_EAX), in do_jit()
1958 EMIT3(0x8B, add_2reg(0x40, IA32_EBP, IA32_EAX), in do_jit()
1962 EMIT2(0x8B, add_2reg(0xC0, dst_lo, IA32_EAX)); in do_jit()
1983 EMIT2(add_2reg(0x40, IA32_EAX, IA32_EDX), in do_jit()
1986 EMIT1_off32(add_2reg(0x80, IA32_EAX, IA32_EDX), in do_jit()
2001 EMIT2(add_2reg(0x40, IA32_EAX, in do_jit()
2005 EMIT1(add_2reg(0x80, IA32_EAX, in do_jit()
2019 EMIT3(0x8B, add_2reg(0x40, IA32_EBP, IA32_EAX), in do_jit()
2023 EMIT2(0x8B, add_2reg(0xC0, src_lo, IA32_EAX)); in do_jit()
2036 EMIT2(add_2reg(0x40, IA32_EAX, IA32_EDX), in do_jit()
2039 EMIT1_off32(add_2reg(0x80, IA32_EAX, IA32_EDX), in do_jit()
2067 add_2reg(0x80, IA32_EAX, IA32_EDX), in do_jit()
2116 EMIT3(0x8B, add_2reg(0x40, IA32_EBP, IA32_EAX), in do_jit()
2130 EMIT3(0x89, add_2reg(0x40, IA32_EBP, IA32_EAX), in do_jit()
2162 u8 dreg_lo = dstk ? IA32_EAX : dst_lo; in do_jit()
2168 EMIT3(0x8B, add_2reg(0x40, IA32_EBP, IA32_EAX), in do_jit()
2200 u8 dreg_lo = dstk ? IA32_EAX : dst_lo; in do_jit()
2206 EMIT3(0x8B, add_2reg(0x40, IA32_EBP, IA32_EAX), in do_jit()
2233 u8 dreg_lo = IA32_EAX; in do_jit()
2239 EMIT3(0x8B, add_2reg(0x40, IA32_EBP, IA32_EAX), in do_jit()
2277 u8 dreg_lo = IA32_EAX; in do_jit()
2284 EMIT3(0x8B, add_2reg(0x40, IA32_EBP, IA32_EAX), in do_jit()
2333 u8 dreg_lo = dstk ? IA32_EAX : dst_lo; in do_jit()
2340 EMIT3(0x8B, add_2reg(0x40, IA32_EBP, IA32_EAX), in do_jit()
2380 u8 dreg_lo = dstk ? IA32_EAX : dst_lo; in do_jit()
2387 EMIT3(0x8B, add_2reg(0x40, IA32_EBP, IA32_EAX), in do_jit()