1 /* SPDX-License-Identifier: GPL-2.0 */
8 #include <asm/asm-offsets.h>
10 #include <asm/nospec-branch.h>
63 #define GEN(reg) THUNK reg  macro
64 #include <asm/GEN-for-each-reg.h>
65 #undef GEN
70 #define GEN(reg) __EXPORT_THUNK(__x86_indirect_thunk_ ## reg)  macro
71 #include <asm/GEN-for-each-reg.h>
72 #undef GEN
92 #define GEN(reg) CALL_THUNK reg  macro
93 #include <asm/GEN-for-each-reg.h>
94 #undef GEN
99 #define GEN(reg) __EXPORT_THUNK(__x86_indirect_call_thunk_ ## reg)  macro
100 #include <asm/GEN-for-each-reg.h>
101 #undef GEN
118 #define GEN(reg) JUMP_THUNK reg  macro
119 #include <asm/GEN-for-each-reg.h>
120 #undef GEN
125 #define GEN(reg) __EXPORT_THUNK(__x86_indirect_jump_thunk_ ## reg)  macro
126 #include <asm/GEN-for-each-reg.h>
127 #undef GEN
140  * - srso_alias_untrain_ret() is 2M aligned
141  * - srso_alias_safe_ret() is also in the same 2M page but bits 2, 8, 14
180  * SRSO untraining sequence for Zen1/2, similar to retbleed_untrain_ret()
190 	.skip 64 - (srso_safe_ret - srso_untrain_ret), 0xcc
241  * The SRSO Zen1/2 (MOVABS) untraining sequence is longer than the
247  * Regarding alignment - the instructions which need to be untrained,
248  * must all start at a cacheline boundary for Zen1/2 generations. That
255  * Safety details here pertain to the AMD Zen{1,2} microarchitecture:
258  * 2) The instruction at retbleed_untrain_ret must contain, and not
261  *    from re-poisioning the BTB prediction.
264 	.skip 64 - (retbleed_return_thunk - retbleed_untrain_ret), 0xcc
335 	 * Keep the hotpath in a 16byte I-fetch for the non-debug
348 	call	2f
350 2:
364  * This function name is magical and is used by -mfunction-return=thunk-extern