Lines Matching refs:arch
112 struct kvm_lapic *apic = vcpu->arch.apic; in kvm_apic_pending_eoi()
222 struct kvm_lapic *apic = vcpu->arch.apic; in kvm_recalculate_phys_map()
267 if (vcpu->kvm->arch.x2apic_format) { in kvm_recalculate_phys_map()
297 struct kvm_lapic *apic = vcpu->arch.apic; in kvm_recalculate_logical_map()
384 if (atomic_read_acquire(&kvm->arch.apic_map_dirty) == CLEAN) in kvm_recalculate_apic_map()
390 mutex_lock(&kvm->arch.apic_map_lock); in kvm_recalculate_apic_map()
400 if (atomic_cmpxchg_acquire(&kvm->arch.apic_map_dirty, in kvm_recalculate_apic_map()
403 mutex_unlock(&kvm->arch.apic_map_lock); in kvm_recalculate_apic_map()
418 max_id = max(max_id, kvm_x2apic_id(vcpu->arch.apic)); in kvm_recalculate_apic_map()
469 old = rcu_dereference_protected(kvm->arch.apic_map, in kvm_recalculate_apic_map()
470 lockdep_is_held(&kvm->arch.apic_map_lock)); in kvm_recalculate_apic_map()
471 rcu_assign_pointer(kvm->arch.apic_map, new); in kvm_recalculate_apic_map()
476 atomic_cmpxchg_release(&kvm->arch.apic_map_dirty, in kvm_recalculate_apic_map()
478 mutex_unlock(&kvm->arch.apic_map_lock); in kvm_recalculate_apic_map()
499 atomic_set_release(&apic->vcpu->kvm->arch.apic_map_dirty, DIRTY); in apic_set_spiv()
512 atomic_set_release(&apic->vcpu->kvm->arch.apic_map_dirty, DIRTY); in kvm_apic_set_xapic_id()
518 atomic_set_release(&apic->vcpu->kvm->arch.apic_map_dirty, DIRTY); in kvm_apic_set_ldr()
524 atomic_set_release(&apic->vcpu->kvm->arch.apic_map_dirty, DIRTY); in kvm_apic_set_dfr()
535 atomic_set_release(&apic->vcpu->kvm->arch.apic_map_dirty, DIRTY); in kvm_apic_set_x2apic_id()
570 return KVM_APIC_MAX_NR_LVT_ENTRIES - !(vcpu->arch.mcg_cap & MCG_CMCI_P); in kvm_apic_calc_nr_lvt_entries()
575 struct kvm_lapic *apic = vcpu->arch.apic; in kvm_apic_set_version()
599 struct kvm_lapic *apic = vcpu->arch.apic; in kvm_apic_after_set_mcg_cap()
692 struct kvm_lapic *apic = vcpu->arch.apic; in kvm_apic_update_irr()
740 apic_clear_irr(vec, vcpu->arch.apic); in kvm_apic_clear_irr()
815 return apic_find_highest_irr(vcpu->arch.apic); in kvm_lapic_find_highest_irr()
826 struct kvm_lapic *apic = vcpu->arch.apic; in kvm_apic_set_irq()
870 map = rcu_dereference(kvm->arch.apic_map); in kvm_pv_send_ipi()
886 return kvm_write_guest_cached(vcpu->kvm, &vcpu->arch.pv_eoi.data, &val, in pv_eoi_put_user()
893 return kvm_read_guest_cached(vcpu->kvm, &vcpu->arch.pv_eoi.data, val, in pv_eoi_get_user()
899 return vcpu->arch.pv_eoi.msr_val & KVM_MSR_ENABLED; in pv_eoi_enabled()
907 __set_bit(KVM_APIC_PV_EOI_PENDING, &vcpu->arch.apic_attention); in pv_eoi_set_pending()
927 __clear_bit(KVM_APIC_PV_EOI_PENDING, &vcpu->arch.apic_attention); in pv_eoi_test_and_clr_pending()
977 apic_update_ppr(vcpu->arch.apic); in kvm_apic_update_ppr()
1060 if (!vcpu->kvm->arch.x2apic_broadcast_quirk_disabled && in kvm_apic_mda()
1070 struct kvm_lapic *target = vcpu->arch.apic; in kvm_apic_match_dest()
1110 if (!kvm->arch.disabled_lapic_found) { in kvm_apic_disabled_lapic_found()
1111 kvm->arch.disabled_lapic_found = true; in kvm_apic_disabled_lapic_found()
1119 if (kvm->arch.x2apic_broadcast_quirk_disabled) { in kvm_apic_is_broadcast_dest()
1229 map = rcu_dereference(kvm->arch.apic_map); in kvm_irq_delivery_to_apic_fast()
1271 map = rcu_dereference(kvm->arch.apic_map); in kvm_intr_is_single_vcpu_fast()
1302 vcpu->arch.apic_arb_prio++; in __apic_accept_irq()
1334 vcpu->arch.pv.pv_unhalted = 1; in __apic_accept_irq()
1406 map = rcu_dereference(kvm->arch.apic_map); in kvm_bitmap_or_dest_vcpus()
1434 return vcpu1->arch.apic_arb_prio - vcpu2->arch.apic_arb_prio; in kvm_apic_compare_prio()
1439 return test_bit(vector, apic->vcpu->arch.ioapic_handled_vectors); in kvm_ioapic_handles_vector()
1452 apic->vcpu->arch.pending_ioapic_eoi = vector; in kvm_ioapic_send_eoi()
1496 struct kvm_lapic *apic = vcpu->arch.apic; in kvm_apic_set_eoi_accelerated()
1563 if (apic->vcpu->arch.tpr_access_reporting) in report_tpr_access()
1780 struct kvm_lapic *apic = vcpu->arch.apic; in lapic_timer_int_injected()
1798 u64 timer_advance_ns = vcpu->arch.apic->lapic_timer.timer_advance_ns; in __wait_lapic_expire()
1806 if (vcpu->arch.tsc_scaling_ratio == kvm_caps.default_tsc_scaling_ratio) { in __wait_lapic_expire()
1811 do_div(delay_ns, vcpu->arch.virtual_tsc_khz); in __wait_lapic_expire()
1819 struct kvm_lapic *apic = vcpu->arch.apic; in adjust_lapic_timer_advance()
1831 do_div(ns, vcpu->arch.virtual_tsc_khz); in adjust_lapic_timer_advance()
1836 do_div(ns, vcpu->arch.virtual_tsc_khz); in adjust_lapic_timer_advance()
1847 struct kvm_lapic *apic = vcpu->arch.apic; in __kvm_wait_lapic_expire()
1873 vcpu->arch.apic->lapic_timer.expired_tscdeadline && in kvm_wait_lapic_expire()
1874 vcpu->arch.apic->lapic_timer.timer_advance_ns && in kvm_wait_lapic_expire()
1918 if (vcpu->arch.apic->lapic_timer.expired_tscdeadline && in apic_timer_expired()
1919 vcpu->arch.apic->lapic_timer.timer_advance_ns) in apic_timer_expired()
1938 unsigned long this_tsc_khz = vcpu->arch.virtual_tsc_khz; in start_sw_tscdeadline()
2089 return vcpu->arch.apic->lapic_timer.hv_timer_in_use; in kvm_lapic_hv_timer_in_use()
2174 struct kvm_lapic *apic = vcpu->arch.apic; in kvm_lapic_expired_hv_timer()
2195 restart_apic_timer(vcpu->arch.apic); in kvm_lapic_switch_to_hv_timer()
2200 struct kvm_lapic *apic = vcpu->arch.apic; in kvm_lapic_switch_to_sw_timer()
2211 struct kvm_lapic *apic = vcpu->arch.apic; in kvm_lapic_restart_hv_timer()
2240 atomic_inc(&apic->vcpu->kvm->arch.vapics_in_nmi_mode); in apic_manage_nmi_watchdog()
2242 atomic_dec(&apic->vcpu->kvm->arch.vapics_in_nmi_mode); in apic_manage_nmi_watchdog()
2442 kvm_lapic_reg_write(vcpu->arch.apic, APIC_EOI, 0); in kvm_lapic_set_eoi()
2472 struct kvm_lapic *apic = vcpu->arch.apic; in kvm_apic_write_nodecode()
2494 struct kvm_lapic *apic = vcpu->arch.apic; in kvm_free_lapic()
2496 if (!vcpu->arch.apic) in kvm_free_lapic()
2501 if (!(vcpu->arch.apic_base & MSR_IA32_APICBASE_ENABLE)) in kvm_free_lapic()
2520 struct kvm_lapic *apic = vcpu->arch.apic; in kvm_get_lapic_tscdeadline_msr()
2530 struct kvm_lapic *apic = vcpu->arch.apic; in kvm_set_lapic_tscdeadline_msr()
2542 apic_set_tpr(vcpu->arch.apic, (cr8 & 0x0f) << 4); in kvm_lapic_set_tpr()
2549 tpr = (u64) kvm_lapic_get_reg(vcpu->arch.apic, APIC_TASKPRI); in kvm_lapic_get_cr8()
2556 u64 old_value = vcpu->arch.apic_base; in kvm_lapic_set_base()
2557 struct kvm_lapic *apic = vcpu->arch.apic; in kvm_lapic_set_base()
2559 vcpu->arch.apic_base = value; in kvm_lapic_set_base()
2576 atomic_set_release(&apic->vcpu->kvm->arch.apic_map_dirty, DIRTY); in kvm_lapic_set_base()
2592 apic->base_address = apic->vcpu->arch.apic_base & in kvm_lapic_set_base()
2604 struct kvm_lapic *apic = vcpu->arch.apic; in kvm_apic_update_apicv()
2629 if (kvm->arch.apic_access_memslot_enabled || in kvm_alloc_apic_access_page()
2630 kvm->arch.apic_access_memslot_inhibited) in kvm_alloc_apic_access_page()
2651 kvm->arch.apic_access_memslot_enabled = true; in kvm_alloc_apic_access_page()
2662 if (!kvm->arch.apic_access_memslot_enabled) in kvm_inhibit_apic_access_page()
2669 if (kvm->arch.apic_access_memslot_enabled) { in kvm_inhibit_apic_access_page()
2679 kvm->arch.apic_access_memslot_enabled = false; in kvm_inhibit_apic_access_page()
2685 kvm->arch.apic_access_memslot_inhibited = true; in kvm_inhibit_apic_access_page()
2695 struct kvm_lapic *apic = vcpu->arch.apic; in kvm_lapic_reset()
2751 vcpu->arch.pv_eoi.msr_val = 0; in kvm_lapic_reset()
2759 vcpu->arch.apic_arb_prio = 0; in kvm_lapic_reset()
2760 vcpu->arch.apic_attention = 0; in kvm_lapic_reset()
2778 struct kvm_lapic *apic = vcpu->arch.apic; in apic_has_pending_timer()
2808 struct kvm_lapic *apic = vcpu->arch.apic; in kvm_apic_nmi_wd_deliver()
2844 vcpu->arch.apic = apic; in kvm_create_lapic()
2871 vcpu->arch.apic_base = MSR_IA32_APICBASE_ENABLE; in kvm_create_lapic()
2878 vcpu->arch.apic = NULL; in kvm_create_lapic()
2885 struct kvm_lapic *apic = vcpu->arch.apic; in kvm_apic_has_interrupt()
2898 u32 lvt0 = kvm_lapic_get_reg(vcpu->arch.apic, APIC_LVT0); in kvm_apic_accept_pic_intr()
2900 if (!kvm_apic_hw_enabled(vcpu->arch.apic)) in kvm_apic_accept_pic_intr()
2910 struct kvm_lapic *apic = vcpu->arch.apic; in kvm_inject_apic_timer_irqs()
2921 struct kvm_lapic *apic = vcpu->arch.apic; in kvm_get_apic_interrupt()
2959 if (apic_x2apic_mode(vcpu->arch.apic)) { in kvm_apic_state_fixup()
2964 if (vcpu->kvm->arch.x2apic_format) { in kvm_apic_state_fixup()
2996 memcpy(s->regs, vcpu->arch.apic->regs, sizeof(*s)); in kvm_apic_get_state()
3003 __apic_read(vcpu->arch.apic, APIC_TMCCT)); in kvm_apic_get_state()
3010 struct kvm_lapic *apic = vcpu->arch.apic; in kvm_apic_set_state()
3015 kvm_lapic_set_base(vcpu, vcpu->arch.apic_base); in kvm_apic_set_state()
3024 memcpy(vcpu->arch.apic->regs, s->regs, sizeof(*s)); in kvm_apic_set_state()
3026 atomic_set_release(&apic->vcpu->kvm->arch.apic_map_dirty, DIRTY); in kvm_apic_set_state()
3048 vcpu->arch.apic_arb_prio = 0; in kvm_apic_set_state()
3061 timer = &vcpu->arch.apic->lapic_timer.timer; in __kvm_migrate_apic_timer()
3100 if (test_bit(KVM_APIC_PV_EOI_PENDING, &vcpu->arch.apic_attention)) in kvm_lapic_sync_from_vapic()
3101 apic_sync_pv_eoi_from_guest(vcpu, vcpu->arch.apic); in kvm_lapic_sync_from_vapic()
3103 if (!test_bit(KVM_APIC_CHECK_VAPIC, &vcpu->arch.apic_attention)) in kvm_lapic_sync_from_vapic()
3106 if (kvm_read_guest_cached(vcpu->kvm, &vcpu->arch.apic->vapic_cache, &data, in kvm_lapic_sync_from_vapic()
3110 apic_set_tpr(vcpu->arch.apic, data & 0xff); in kvm_lapic_sync_from_vapic()
3143 struct kvm_lapic *apic = vcpu->arch.apic; in kvm_lapic_sync_to_vapic()
3147 if (!test_bit(KVM_APIC_CHECK_VAPIC, &vcpu->arch.apic_attention)) in kvm_lapic_sync_to_vapic()
3159 kvm_write_guest_cached(vcpu->kvm, &vcpu->arch.apic->vapic_cache, &data, in kvm_lapic_sync_to_vapic()
3167 &vcpu->arch.apic->vapic_cache, in kvm_lapic_set_vapic_addr()
3170 __set_bit(KVM_APIC_CHECK_VAPIC, &vcpu->arch.apic_attention); in kvm_lapic_set_vapic_addr()
3172 __clear_bit(KVM_APIC_CHECK_VAPIC, &vcpu->arch.apic_attention); in kvm_lapic_set_vapic_addr()
3175 vcpu->arch.apic->vapic_addr = vapic_addr; in kvm_lapic_set_vapic_addr()
3215 struct kvm_lapic *apic = vcpu->arch.apic; in kvm_x2apic_msr_write()
3226 struct kvm_lapic *apic = vcpu->arch.apic; in kvm_x2apic_msr_read()
3240 return kvm_lapic_msr_write(vcpu->arch.apic, reg, data); in kvm_hv_vapic_msr_write()
3248 return kvm_lapic_msr_read(vcpu->arch.apic, reg, data); in kvm_hv_vapic_msr_read()
3254 struct gfn_to_hva_cache *ghc = &vcpu->arch.pv_eoi.data; in kvm_lapic_set_pv_eoi()
3272 vcpu->arch.pv_eoi.msr_val = data; in kvm_lapic_set_pv_eoi()
3279 struct kvm_lapic *apic = vcpu->arch.apic; in kvm_apic_accept_events()
3303 WARN_ON_ONCE(vcpu->arch.mp_state == KVM_MP_STATE_INIT_RECEIVED); in kvm_apic_accept_events()
3311 vcpu->arch.mp_state = KVM_MP_STATE_RUNNABLE; in kvm_apic_accept_events()
3313 vcpu->arch.mp_state = KVM_MP_STATE_INIT_RECEIVED; in kvm_apic_accept_events()
3316 if (vcpu->arch.mp_state == KVM_MP_STATE_INIT_RECEIVED) { in kvm_apic_accept_events()
3321 vcpu->arch.mp_state = KVM_MP_STATE_RUNNABLE; in kvm_apic_accept_events()