1 // SPDX-License-Identifier: GPL-2.0-only
16 #include <asm/spec-ctrl.h>
19 #include <asm/pci-direct.h>
32  * Refer to Fam15h Models 00-0fh BKDG - CPUID Fn8000_001E_ECX
43  * variable number of family-specific model-stepping ranges created by
54 #define AMD_LEGACY_ERRATUM(...)		{ -1, __VA_ARGS__, 0 }
93 	/* OSVW unavailable or ID unknown, match family-model-stepping range */  in cpu_has_amd_erratum()
94 	ms = (cpu->x86_model << 4) | cpu->x86_stepping;  in cpu_has_amd_erratum()
96 		if ((cpu->x86 == AMD_MODEL_RANGE_FAMILY(range)) &&  in cpu_has_amd_erratum()
143  *	and	section 2.6.2 of "AMD-K6 Processor Revision Guide - Model 6"
169 #define CBAR		(0xfffc) /* Configuration Base Address  (32-bit) */  in init_amd_k5()
172 	if (c->x86_model == 9 || c->x86_model == 10) {  in init_amd_k5()
183 	int mbytes = get_num_physpages() >> (20-PAGE_SHIFT);  in init_amd_k6()
185 	if (c->x86_model < 6) {  in init_amd_k6()
186 		/* Based on AMD doc 20734R - June 2000 */  in init_amd_k6()
187 		if (c->x86_model == 0) {  in init_amd_k6()
194 	if (c->x86_model == 6 && c->x86_stepping == 1) {  in init_amd_k6()
200 		pr_info("AMD K6 stepping B detected - ");  in init_amd_k6()
211 		while (n--)  in init_amd_k6()
214 		d = d2-d;  in init_amd_k6()
223 	if (c->x86_model < 8 ||  in init_amd_k6()
224 	   (c->x86_model == 8 && c->x86_stepping < 8)) {  in init_amd_k6()
243 	if ((c->x86_model == 8 && c->x86_stepping > 7) ||  in init_amd_k6()
244 	     c->x86_model == 9 || c->x86_model == 13) {  in init_amd_k6()
265 	if (c->x86_model == 10) {  in init_amd_k6()
283 	if (c->x86_model >= 6 && c->x86_model <= 10) {  in init_amd_k7()
296 	if ((c->x86_model == 8 && c->x86_stepping >= 1) || (c->x86_model > 8)) {  in init_amd_k7()
306 	if (!c->cpu_index)  in init_amd_k7()
314 	if ((c->x86_model == 6) && ((c->x86_stepping == 0) ||  in init_amd_k7()
315 	    (c->x86_stepping == 1)))  in init_amd_k7()
319 	if ((c->x86_model == 7) && (c->x86_stepping == 0))  in init_amd_k7()
326 	 * See http://www.heise.de/newsticker/data/jow-18.10.01-000 for  in init_amd_k7()
329 	if (((c->x86_model == 6) && (c->x86_stepping >= 2)) ||  in init_amd_k7()
330 	    ((c->x86_model == 7) && (c->x86_stepping >= 1)) ||  in init_amd_k7()
331 	     (c->x86_model > 7))  in init_amd_k7()
338 	 * Don't taint if we are running SMP kernel on a single non-MP  in init_amd_k7()
356 	for (i = apicid - 1; i >= 0; i--) {  in nearby_node()
371  * Fix up cpu_core_id for pre-F17h systems to be in the
372  * [0 .. cores_per_node - 1] range. Not really needed but
379 	if (c->x86 >= 0x17)  in legacy_fixup_core_id()
382 	cus_per_node = c->x86_max_cores / nodes_per_socket;  in legacy_fixup_core_id()
383 	c->cpu_core_id %= cus_per_node;  in legacy_fixup_core_id()
388  * (1) AMD multi-node processors
396 	/* get information required for multi-node processors */  in amd_get_topology()
399 		u32 eax, ebx, ecx, edx;  in amd_get_topology()  local
401 		cpuid(0x8000001e, &eax, &ebx, &ecx, &edx);  in amd_get_topology()
403 		c->cpu_die_id  = ecx & 0xff;  in amd_get_topology()
405 		if (c->x86 == 0x15)  in amd_get_topology()
406 			c->cu_id = ebx & 0xff;  in amd_get_topology()
408 		if (c->x86 >= 0x17) {  in amd_get_topology()
409 			c->cpu_core_id = ebx & 0xff;  in amd_get_topology()
412 				c->x86_max_cores /= smp_num_siblings;  in amd_get_topology()
421 			c->x86_coreid_bits = get_count_order(c->x86_max_cores);  in amd_get_topology()
429 		c->cpu_die_id = value & 7;  in amd_get_topology()
431 		per_cpu(cpu_llc_id, cpu) = c->cpu_die_id;  in amd_get_topology()
450 	bits = c->x86_coreid_bits;  in amd_detect_cmp()
452 	c->cpu_core_id = c->initial_apicid & ((1 << bits)-1);  in amd_detect_cmp()
454 	c->phys_proc_id = c->initial_apicid >> bits;  in amd_detect_cmp()
456 	per_cpu(cpu_llc_id, cpu) = c->cpu_die_id = c->phys_proc_id;  in amd_detect_cmp()
470 	unsigned apicid = c->apicid;  in srat_detect_node()
477 	 * On multi-fabric platform (e.g. Numascale NumaChip) a  in srat_detect_node()
478 	 * platform-specific handler needs to be called to fixup some  in srat_detect_node()
488 		 * - The CPU is missing memory and no node was created.  In  in srat_detect_node()
491 		 * - The APIC IDs differ from the HyperTransport node IDs  in srat_detect_node()
504 		int ht_nodeid = c->initial_apicid;  in srat_detect_node()
519 	unsigned bits, ecx;  in early_init_amd_mc()  local
522 	if (c->extended_cpuid_level < 0x80000008)  in early_init_amd_mc()
525 	ecx = cpuid_ecx(0x80000008);  in early_init_amd_mc()
527 	c->x86_max_cores = (ecx & 0xff) + 1;  in early_init_amd_mc()
530 	bits = (ecx >> 12) & 0xF;  in early_init_amd_mc()
534 		while ((1 << bits) < c->x86_max_cores)  in early_init_amd_mc()
538 	c->x86_coreid_bits = bits;  in early_init_amd_mc()
546 		if (c->x86 > 0x10 ||  in bsp_init_amd()
547 		    (c->x86 == 0x10 && c->x86_model >= 0x2)) {  in bsp_init_amd()
556 	if (c->x86 == 0x15) {  in bsp_init_amd()
564 		va_align.mask	  = (upperbit - 1) & PAGE_MASK;  in bsp_init_amd()
575 		u32 ecx;  in bsp_init_amd()  local
577 		ecx = cpuid_ecx(0x8000001e);  in bsp_init_amd()
578 		__max_die_per_package = nodes_per_socket = ((ecx >> 8) & 7) + 1;  in bsp_init_amd()
588 	    c->x86 >= 0x15 && c->x86 <= 0x17) {  in bsp_init_amd()
591 		switch (c->x86) {  in bsp_init_amd()
611 	switch (c->x86) {  in bsp_init_amd()
613 		switch (c->x86_model) {  in bsp_init_amd()
630 		switch (c->x86_model) {  in bsp_init_amd()
651 	WARN_ONCE(1, "Family 0x%x, model: 0x%x??\n", c->x86, c->x86_model);  in bsp_init_amd()
680 		 * will be a value above 32-bits this is still done for  in early_detect_mem_encrypt()
683 		c->x86_phys_bits -= (cpuid_ebx(0x8000001f) >> 6) & 0x3f;  in early_detect_mem_encrypt()
712 	if (c->x86 >= 0xf)  in early_init_amd()
715 	rdmsr_safe(MSR_AMD64_PATCH_LEVEL, &c->microcode, &dummy);  in early_init_amd()
718 	 * c->x86_power is 8000_0007 edx. Bit 8 is TSC runs at constant rate  in early_init_amd()
719 	 * with P/T states and does not stop in deep C-states  in early_init_amd()
721 	if (c->x86_power & (1 << 8)) {  in early_init_amd()
727 	if (c->x86_power & BIT(12))  in early_init_amd()
731 	if (c->x86_power & BIT(14))  in early_init_amd()
738 	if (c->x86 == 5)  in early_init_amd()
739 		if (c->x86_model == 13 || c->x86_model == 9 ||  in early_init_amd()
740 		    (c->x86_model == 8 && c->x86_stepping >= 8))  in early_init_amd()
745 	 * ApicID can always be treated as an 8-bit value for AMD APIC versions  in early_init_amd()
751 		if (c->x86 > 0x16)  in early_init_amd()
753 		else if (c->x86 >= 0xf) {  in early_init_amd()
771 	/* F16h erratum 793, CVE-2013-6885 */  in early_init_amd()
772 	if (c->x86 == 0x16 && c->x86_model <= 0xf)  in early_init_amd()
786 	/* Re-enable TopologyExtensions if switched off by BIOS */  in early_init_amd()
787 	if (c->x86 == 0x15 &&  in early_init_amd()
788 	    (c->x86_model >= 0x10 && c->x86_model <= 0x6f) &&  in early_init_amd()
795 				pr_info_once(FW_INFO "CPU: Re-enabling disabled Topology Extensions Support.\n");  in early_init_amd()
804 		if (c->x86 == 0x17 && boot_cpu_has(X86_FEATURE_AMD_IBPB))  in early_init_amd()
806 		else if (c->x86 >= 0x19 && !wrmsrl_safe(MSR_IA32_PRED_CMD, PRED_CMD_SBPB)) {  in early_init_amd()
828 	if (c->x86_model < 0x14 && cpu_has(c, X86_FEATURE_LAHF_LM)) {  in init_amd_k8()
836 	if (!c->x86_model_id[0])  in init_amd_k8()
837 		strcpy(c->x86_model_id, "Hammer");  in init_amd_k8()
844 	 * Errata 63 for SH-B3 steppings  in init_amd_k8()
875 	 * degradation for certain nested-paging guests. Prevent this conversion  in init_amd_gh()
901 		return -EINVAL;  in rdrand_cmdline()
906 		return -EINVAL;  in rdrand_cmdline()
923 	 * The self-test can clear X86_FEATURE_RDRAND, so check for  in clear_rdrand_cpuid_bit()
962 	if ((c->x86_model >= 0x02) && (c->x86_model < 0x20)) {  in init_amd_bd()
999 	 * suppresses non-branch predictions.  in init_spectral_chicken()
1036 		if (c->x86 == 0x19 && !cpu_has(c, X86_FEATURE_BTC_NO))  in init_amd_zen1()
1106 	if (c->x86 >= 0x10)  in init_amd()
1114 	c->apicid = read_apic_id();  in init_amd()
1117 	if (c->x86 < 6)  in init_amd()
1120 	switch (c->x86) {  in init_amd()
1147 	if ((c->x86 >= 6) && (!cpu_has(c, X86_FEATURE_XSAVEERPTR)))  in init_amd()
1176 	if (c->x86 > 0x11)  in init_amd()
1194 	    (boot_cpu_has(X86_FEATURE_ZEN1) && c->x86_model > 0x2f))  in init_amd()
1200 	 * Make sure EFER[AIBRSE - Automatic IBRS Enable] is set. The APs are brought up  in init_amd()
1222 	if (c->x86 == 6) {  in amd_size_cache()
1224 		if (c->x86_model == 3 && c->x86_stepping == 0)  in amd_size_cache()
1227 		if (c->x86_model == 4 &&  in amd_size_cache()
1228 			(c->x86_stepping == 0 || c->x86_stepping == 1))  in amd_size_cache()
1237 	u32 ebx, eax, ecx, edx;  in cpu_detect_tlb_amd()  local
1240 	if (c->x86 < 0xf)  in cpu_detect_tlb_amd()
1243 	if (c->extended_cpuid_level < 0x80000006)  in cpu_detect_tlb_amd()
1246 	cpuid(0x80000006, &eax, &ebx, &ecx, &edx);  in cpu_detect_tlb_amd()
1255 	if (c->x86 == 0xf) {  in cpu_detect_tlb_amd()
1256 		cpuid(0x80000005, &eax, &ebx, &ecx, &edx);  in cpu_detect_tlb_amd()
1272 		if (c->x86 == 0x15 && c->x86_model <= 0x1f) {  in cpu_detect_tlb_amd()
1275 			cpuid(0x80000005, &eax, &ebx, &ecx, &edx);  in cpu_detect_tlb_amd()
1292 			  [7] = "486 DX/2-WB",
1294 			  [9] = "486 DX/4-WB",
1295 			  [14] = "Am5x86-WT",
1296 			  [15] = "Am5x86-WB"
1353 	if (c->x86 == 0x17 && ((c->x86_model >= 0x30 && c->x86_model < 0x40) ||  in amd_get_highest_perf()
1354 			       (c->x86_model >= 0x70 && c->x86_model < 0x80)))  in amd_get_highest_perf()
1357 	if (c->x86 == 0x19 && ((c->x86_model >= 0x20 && c->x86_model < 0x30) ||  in amd_get_highest_perf()
1358 			       (c->x86_model >= 0x40 && c->x86_model < 0x70)))  in amd_get_highest_perf()