Lines Matching refs:box
551 static void snbep_uncore_pci_disable_box(struct intel_uncore_box *box) in snbep_uncore_pci_disable_box() argument
553 struct pci_dev *pdev = box->pci_dev; in snbep_uncore_pci_disable_box()
554 int box_ctl = uncore_pci_box_ctl(box); in snbep_uncore_pci_disable_box()
563 static void snbep_uncore_pci_enable_box(struct intel_uncore_box *box) in snbep_uncore_pci_enable_box() argument
565 struct pci_dev *pdev = box->pci_dev; in snbep_uncore_pci_enable_box()
566 int box_ctl = uncore_pci_box_ctl(box); in snbep_uncore_pci_enable_box()
575 static void snbep_uncore_pci_enable_event(struct intel_uncore_box *box, struct perf_event *event) in snbep_uncore_pci_enable_event() argument
577 struct pci_dev *pdev = box->pci_dev; in snbep_uncore_pci_enable_event()
583 static void snbep_uncore_pci_disable_event(struct intel_uncore_box *box, struct perf_event *event) in snbep_uncore_pci_disable_event() argument
585 struct pci_dev *pdev = box->pci_dev; in snbep_uncore_pci_disable_event()
591 static u64 snbep_uncore_pci_read_counter(struct intel_uncore_box *box, struct perf_event *event) in snbep_uncore_pci_read_counter() argument
593 struct pci_dev *pdev = box->pci_dev; in snbep_uncore_pci_read_counter()
603 static void snbep_uncore_pci_init_box(struct intel_uncore_box *box) in snbep_uncore_pci_init_box() argument
605 struct pci_dev *pdev = box->pci_dev; in snbep_uncore_pci_init_box()
606 int box_ctl = uncore_pci_box_ctl(box); in snbep_uncore_pci_init_box()
611 static void snbep_uncore_msr_disable_box(struct intel_uncore_box *box) in snbep_uncore_msr_disable_box() argument
616 msr = uncore_msr_box_ctl(box); in snbep_uncore_msr_disable_box()
624 static void snbep_uncore_msr_enable_box(struct intel_uncore_box *box) in snbep_uncore_msr_enable_box() argument
629 msr = uncore_msr_box_ctl(box); in snbep_uncore_msr_enable_box()
637 static void snbep_uncore_msr_enable_event(struct intel_uncore_box *box, struct perf_event *event) in snbep_uncore_msr_enable_event() argument
643 wrmsrl(reg1->reg, uncore_shared_reg_config(box, 0)); in snbep_uncore_msr_enable_event()
648 static void snbep_uncore_msr_disable_event(struct intel_uncore_box *box, in snbep_uncore_msr_disable_event() argument
656 static void snbep_uncore_msr_init_box(struct intel_uncore_box *box) in snbep_uncore_msr_init_box() argument
658 unsigned msr = uncore_msr_box_ctl(box); in snbep_uncore_msr_init_box()
929 static void snbep_cbox_put_constraint(struct intel_uncore_box *box, struct perf_event *event) in snbep_cbox_put_constraint() argument
932 struct intel_uncore_extra_reg *er = &box->shared_regs[0]; in snbep_cbox_put_constraint()
935 if (uncore_box_is_fake(box)) in snbep_cbox_put_constraint()
946 __snbep_cbox_get_constraint(struct intel_uncore_box *box, struct perf_event *event, in __snbep_cbox_get_constraint() argument
950 struct intel_uncore_extra_reg *er = &box->shared_regs[0]; in __snbep_cbox_get_constraint()
962 if (!uncore_box_is_fake(box) && (reg1->alloc & (0x1 << i))) in __snbep_cbox_get_constraint()
980 if (!uncore_box_is_fake(box)) in __snbep_cbox_get_constraint()
1009 snbep_cbox_get_constraint(struct intel_uncore_box *box, struct perf_event *event) in snbep_cbox_get_constraint() argument
1011 return __snbep_cbox_get_constraint(box, event, snbep_cbox_filter_mask); in snbep_cbox_get_constraint()
1014 static int snbep_cbox_hw_config(struct intel_uncore_box *box, struct perf_event *event) in snbep_cbox_hw_config() argument
1028 SNBEP_CBO_MSR_OFFSET * box->pmu->pmu_idx; in snbep_cbox_hw_config()
1078 snbep_pcu_get_constraint(struct intel_uncore_box *box, struct perf_event *event) in snbep_pcu_get_constraint() argument
1081 struct intel_uncore_extra_reg *er = &box->shared_regs[0]; in snbep_pcu_get_constraint()
1088 (!uncore_box_is_fake(box) && reg1->alloc)) in snbep_pcu_get_constraint()
1111 if (!uncore_box_is_fake(box)) { in snbep_pcu_get_constraint()
1119 static void snbep_pcu_put_constraint(struct intel_uncore_box *box, struct perf_event *event) in snbep_pcu_put_constraint() argument
1122 struct intel_uncore_extra_reg *er = &box->shared_regs[0]; in snbep_pcu_put_constraint()
1124 if (uncore_box_is_fake(box) || !reg1->alloc) in snbep_pcu_put_constraint()
1131 static int snbep_pcu_hw_config(struct intel_uncore_box *box, struct perf_event *event) in snbep_pcu_hw_config() argument
1186 static int snbep_qpi_hw_config(struct intel_uncore_box *box, struct perf_event *event) in snbep_qpi_hw_config() argument
1202 static void snbep_qpi_enable_event(struct intel_uncore_box *box, struct perf_event *event) in snbep_qpi_enable_event() argument
1204 struct pci_dev *pdev = box->pci_dev; in snbep_qpi_enable_event()
1210 int idx = box->pmu->pmu_idx + SNBEP_PCI_QPI_PORT0_FILTER; in snbep_qpi_enable_event()
1211 int die = box->dieid; in snbep_qpi_enable_event()
1520 static void ivbep_uncore_msr_init_box(struct intel_uncore_box *box) in ivbep_uncore_msr_init_box() argument
1522 unsigned msr = uncore_msr_box_ctl(box); in ivbep_uncore_msr_init_box()
1527 static void ivbep_uncore_pci_init_box(struct intel_uncore_box *box) in ivbep_uncore_pci_init_box() argument
1529 struct pci_dev *pdev = box->pci_dev; in ivbep_uncore_pci_init_box()
1742 ivbep_cbox_get_constraint(struct intel_uncore_box *box, struct perf_event *event) in ivbep_cbox_get_constraint() argument
1744 return __snbep_cbox_get_constraint(box, event, ivbep_cbox_filter_mask); in ivbep_cbox_get_constraint()
1747 static int ivbep_cbox_hw_config(struct intel_uncore_box *box, struct perf_event *event) in ivbep_cbox_hw_config() argument
1761 SNBEP_CBO_MSR_OFFSET * box->pmu->pmu_idx; in ivbep_cbox_hw_config()
1768 static void ivbep_cbox_enable_event(struct intel_uncore_box *box, struct perf_event *event) in ivbep_cbox_enable_event() argument
1774 u64 filter = uncore_shared_reg_config(box, 0); in ivbep_cbox_enable_event()
1869 static void ivbep_uncore_irp_enable_event(struct intel_uncore_box *box, struct perf_event *event) in ivbep_uncore_irp_enable_event() argument
1871 struct pci_dev *pdev = box->pci_dev; in ivbep_uncore_irp_enable_event()
1878 static void ivbep_uncore_irp_disable_event(struct intel_uncore_box *box, struct perf_event *event) in ivbep_uncore_irp_disable_event() argument
1880 struct pci_dev *pdev = box->pci_dev; in ivbep_uncore_irp_disable_event()
1886 static u64 ivbep_uncore_irp_read_counter(struct intel_uncore_box *box, struct perf_event *event) in ivbep_uncore_irp_read_counter() argument
1888 struct pci_dev *pdev = box->pci_dev; in ivbep_uncore_irp_read_counter()
2169 knl_cha_get_constraint(struct intel_uncore_box *box, struct perf_event *event) in knl_cha_get_constraint() argument
2171 return __snbep_cbox_get_constraint(box, event, knl_cha_filter_mask); in knl_cha_get_constraint()
2174 static int knl_cha_hw_config(struct intel_uncore_box *box, in knl_cha_hw_config() argument
2189 KNL_CHA_MSR_OFFSET * box->pmu->pmu_idx; in knl_cha_hw_config()
2200 static void hswep_cbox_enable_event(struct intel_uncore_box *box,
2274 static void knl_uncore_imc_enable_box(struct intel_uncore_box *box) in knl_uncore_imc_enable_box() argument
2276 struct pci_dev *pdev = box->pci_dev; in knl_uncore_imc_enable_box()
2277 int box_ctl = uncore_pci_box_ctl(box); in knl_uncore_imc_enable_box()
2282 static void knl_uncore_imc_enable_event(struct intel_uncore_box *box, in knl_uncore_imc_enable_event() argument
2285 struct pci_dev *pdev = box->pci_dev; in knl_uncore_imc_enable_event()
2597 static int hswep_ubox_hw_config(struct intel_uncore_box *box, struct perf_event *event) in hswep_ubox_hw_config() argument
2725 hswep_cbox_get_constraint(struct intel_uncore_box *box, struct perf_event *event) in hswep_cbox_get_constraint() argument
2727 return __snbep_cbox_get_constraint(box, event, hswep_cbox_filter_mask); in hswep_cbox_get_constraint()
2730 static int hswep_cbox_hw_config(struct intel_uncore_box *box, struct perf_event *event) in hswep_cbox_hw_config() argument
2744 HSWEP_CBO_MSR_OFFSET * box->pmu->pmu_idx; in hswep_cbox_hw_config()
2751 static void hswep_cbox_enable_event(struct intel_uncore_box *box, in hswep_cbox_enable_event() argument
2758 u64 filter = uncore_shared_reg_config(box, 0); in hswep_cbox_enable_event()
2797 static void hswep_uncore_sbox_msr_init_box(struct intel_uncore_box *box) in hswep_uncore_sbox_msr_init_box() argument
2799 unsigned msr = uncore_msr_box_ctl(box); in hswep_uncore_sbox_msr_init_box()
2847 static int hswep_pcu_hw_config(struct intel_uncore_box *box, struct perf_event *event) in hswep_pcu_hw_config() argument
2955 static u64 hswep_uncore_irp_read_counter(struct intel_uncore_box *box, struct perf_event *event) in hswep_uncore_irp_read_counter() argument
2957 struct pci_dev *pdev = box->pci_dev; in hswep_uncore_irp_read_counter()
3611 skx_cha_get_constraint(struct intel_uncore_box *box, struct perf_event *event) in skx_cha_get_constraint() argument
3613 return __snbep_cbox_get_constraint(box, event, skx_cha_filter_mask); in skx_cha_get_constraint()
3616 static int skx_cha_hw_config(struct intel_uncore_box *box, struct perf_event *event) in skx_cha_hw_config() argument
3633 HSWEP_CBO_MSR_OFFSET * box->pmu->pmu_idx; in skx_cha_hw_config()
3695 static void skx_iio_enable_event(struct intel_uncore_box *box, in skx_iio_enable_event() argument
4246 static void skx_upi_uncore_pci_init_box(struct intel_uncore_box *box) in skx_upi_uncore_pci_init_box() argument
4248 struct pci_dev *pdev = box->pci_dev; in skx_upi_uncore_pci_init_box()
4250 __set_bit(UNCORE_BOX_FLAG_CTL_OFFS8, &box->flags); in skx_upi_uncore_pci_init_box()
4407 static void skx_m2m_uncore_pci_init_box(struct intel_uncore_box *box) in skx_m2m_uncore_pci_init_box() argument
4409 struct pci_dev *pdev = box->pci_dev; in skx_m2m_uncore_pci_init_box()
4411 __set_bit(UNCORE_BOX_FLAG_CTL_OFFS8, &box->flags); in skx_m2m_uncore_pci_init_box()
4628 static int snr_cha_hw_config(struct intel_uncore_box *box, struct perf_event *event) in snr_cha_hw_config() argument
4633 box->pmu->type->msr_offset * box->pmu->pmu_idx; in snr_cha_hw_config()
4640 static void snr_cha_enable_event(struct intel_uncore_box *box, in snr_cha_enable_event() argument
4831 static int snr_pcu_hw_config(struct intel_uncore_box *box, struct perf_event *event) in snr_pcu_hw_config() argument
4936 static void snr_m2m_uncore_pci_init_box(struct intel_uncore_box *box) in snr_m2m_uncore_pci_init_box() argument
4938 struct pci_dev *pdev = box->pci_dev; in snr_m2m_uncore_pci_init_box()
4939 int box_ctl = uncore_pci_box_ctl(box); in snr_m2m_uncore_pci_init_box()
4941 __set_bit(UNCORE_BOX_FLAG_CTL_OFFS8, &box->flags); in snr_m2m_uncore_pci_init_box()
4982 static void snr_uncore_pci_enable_event(struct intel_uncore_box *box, struct perf_event *event) in snr_uncore_pci_enable_event() argument
4984 struct pci_dev *pdev = box->pci_dev; in snr_uncore_pci_enable_event()
5084 static int snr_uncore_mmio_map(struct intel_uncore_box *box, in snr_uncore_mmio_map() argument
5088 struct pci_dev *pdev = snr_uncore_get_mc_dev(device, box->dieid); in snr_uncore_mmio_map()
5089 struct intel_uncore_type *type = box->pmu->type; in snr_uncore_mmio_map()
5106 box->io_addr = ioremap(addr, type->mmio_map_size); in snr_uncore_mmio_map()
5107 if (!box->io_addr) { in snr_uncore_mmio_map()
5115 static void __snr_uncore_mmio_init_box(struct intel_uncore_box *box, in __snr_uncore_mmio_init_box() argument
5119 if (!snr_uncore_mmio_map(box, box_ctl, mem_offset, device)) in __snr_uncore_mmio_init_box()
5120 writel(IVBEP_PMON_BOX_CTL_INT, box->io_addr); in __snr_uncore_mmio_init_box()
5123 static void snr_uncore_mmio_init_box(struct intel_uncore_box *box) in snr_uncore_mmio_init_box() argument
5125 __snr_uncore_mmio_init_box(box, uncore_mmio_box_ctl(box), in snr_uncore_mmio_init_box()
5130 static void snr_uncore_mmio_disable_box(struct intel_uncore_box *box) in snr_uncore_mmio_disable_box() argument
5134 if (!box->io_addr) in snr_uncore_mmio_disable_box()
5137 config = readl(box->io_addr); in snr_uncore_mmio_disable_box()
5139 writel(config, box->io_addr); in snr_uncore_mmio_disable_box()
5142 static void snr_uncore_mmio_enable_box(struct intel_uncore_box *box) in snr_uncore_mmio_enable_box() argument
5146 if (!box->io_addr) in snr_uncore_mmio_enable_box()
5149 config = readl(box->io_addr); in snr_uncore_mmio_enable_box()
5151 writel(config, box->io_addr); in snr_uncore_mmio_enable_box()
5154 static void snr_uncore_mmio_enable_event(struct intel_uncore_box *box, in snr_uncore_mmio_enable_event() argument
5159 if (!box->io_addr) in snr_uncore_mmio_enable_event()
5162 if (!uncore_mmio_is_valid_offset(box, hwc->config_base)) in snr_uncore_mmio_enable_event()
5166 box->io_addr + hwc->config_base); in snr_uncore_mmio_enable_event()
5169 static void snr_uncore_mmio_disable_event(struct intel_uncore_box *box, in snr_uncore_mmio_disable_event() argument
5174 if (!box->io_addr) in snr_uncore_mmio_disable_event()
5177 if (!uncore_mmio_is_valid_offset(box, hwc->config_base)) in snr_uncore_mmio_disable_event()
5180 writel(hwc->config, box->io_addr + hwc->config_base); in snr_uncore_mmio_disable_event()
5289 static int icx_cha_hw_config(struct intel_uncore_box *box, struct perf_event *event) in icx_cha_hw_config() argument
5296 icx_cha_msr_offsets[box->pmu->pmu_idx]; in icx_cha_hw_config()
5787 static void icx_uncore_imc_init_box(struct intel_uncore_box *box) in icx_uncore_imc_init_box() argument
5789 unsigned int box_ctl = box->pmu->type->box_ctl + in icx_uncore_imc_init_box()
5790 box->pmu->type->mmio_offset * (box->pmu->pmu_idx % ICX_NUMBER_IMC_CHN); in icx_uncore_imc_init_box()
5791 int mem_offset = (box->pmu->pmu_idx / ICX_NUMBER_IMC_CHN) * ICX_IMC_MEM_STRIDE + in icx_uncore_imc_init_box()
5794 __snr_uncore_mmio_init_box(box, box_ctl, mem_offset, in icx_uncore_imc_init_box()
5860 static void icx_uncore_imc_freerunning_init_box(struct intel_uncore_box *box) in icx_uncore_imc_freerunning_init_box() argument
5862 int mem_offset = box->pmu->pmu_idx * ICX_IMC_MEM_STRIDE + in icx_uncore_imc_freerunning_init_box()
5865 snr_uncore_mmio_map(box, uncore_mmio_box_ctl(box), in icx_uncore_imc_freerunning_init_box()
5903 static void spr_uncore_msr_enable_event(struct intel_uncore_box *box, in spr_uncore_msr_enable_event() argument
5915 static void spr_uncore_msr_disable_event(struct intel_uncore_box *box, in spr_uncore_msr_disable_event() argument
5927 static int spr_cha_hw_config(struct intel_uncore_box *box, struct perf_event *event) in spr_cha_hw_config() argument
5931 struct intel_uncore_type *type = box->pmu->type; in spr_cha_hw_config()
5935 HSWEP_CBO_MSR_OFFSET * type->box_ids[box->pmu->pmu_idx]; in spr_cha_hw_config()
6053 static void spr_uncore_mmio_enable_event(struct intel_uncore_box *box, in spr_uncore_mmio_enable_event() argument
6058 if (!box->io_addr) in spr_uncore_mmio_enable_event()
6062 writel(SNBEP_PMON_CTL_EN, box->io_addr + hwc->config_base); in spr_uncore_mmio_enable_event()
6064 writel(hwc->config, box->io_addr + hwc->config_base); in spr_uncore_mmio_enable_event()
6098 static void spr_uncore_pci_enable_event(struct intel_uncore_box *box, in spr_uncore_pci_enable_event() argument
6101 struct pci_dev *pdev = box->pci_dev; in spr_uncore_pci_enable_event()
6330 static void spr_uncore_imc_freerunning_init_box(struct intel_uncore_box *box) in spr_uncore_imc_freerunning_init_box() argument
6332 int mem_offset = box->pmu->pmu_idx * ICX_IMC_MEM_STRIDE + SNR_IMC_MMIO_MEM0_OFFSET; in spr_uncore_imc_freerunning_init_box()
6334 snr_uncore_mmio_map(box, uncore_mmio_box_ctl(box), in spr_uncore_imc_freerunning_init_box()