Lines Matching refs:ibs_data

926 static void perf_ibs_get_data_src(struct perf_ibs_data *ibs_data,  in perf_ibs_get_data_src()  argument
939 static __u64 perf_ibs_get_op_data2(struct perf_ibs_data *ibs_data, in perf_ibs_get_op_data2() argument
942 __u64 val = ibs_data->regs[ibs_op_msr_idx(MSR_AMD64_IBSOPDATA2)]; in perf_ibs_get_op_data2()
958 struct perf_ibs_data *ibs_data, in perf_ibs_parse_ld_st_data() argument
966 op_data3.val = ibs_data->regs[ibs_op_msr_idx(MSR_AMD64_IBSOPDATA3)]; in perf_ibs_parse_ld_st_data()
973 op_data2.val = perf_ibs_get_op_data2(ibs_data, &op_data3); in perf_ibs_parse_ld_st_data()
976 perf_ibs_get_data_src(ibs_data, data, &op_data2, &op_data3); in perf_ibs_parse_ld_st_data()
982 op_data.val = ibs_data->regs[ibs_op_msr_idx(MSR_AMD64_IBSOPDATA)]; in perf_ibs_parse_ld_st_data()
994 data->addr = ibs_data->regs[ibs_op_msr_idx(MSR_AMD64_IBSDCLINAD)]; in perf_ibs_parse_ld_st_data()
999 data->phys_addr = ibs_data->regs[ibs_op_msr_idx(MSR_AMD64_IBSDCPHYSAD)]; in perf_ibs_parse_ld_st_data()
1027 struct perf_ibs_data ibs_data; in perf_ibs_handle_irq() local
1051 buf = ibs_data.regs; in perf_ibs_handle_irq()
1056 config = &ibs_data.regs[0]; in perf_ibs_handle_irq()
1062 ibs_data.caps = ibs_caps; in perf_ibs_handle_irq()
1097 ibs_data.size = sizeof(u64) * size; in perf_ibs_handle_irq()
1100 if (check_rip && (ibs_data.regs[2] & IBS_RIP_INVALID)) { in perf_ibs_handle_irq()
1104 if (perf_ibs->fetch_ignore_if_zero_rip && !(ibs_data.regs[1])) in perf_ibs_handle_irq()
1107 set_linear_ip(&regs, ibs_data.regs[1]); in perf_ibs_handle_irq()
1114 .size = sizeof(u32) + ibs_data.size, in perf_ibs_handle_irq()
1115 .data = ibs_data.data, in perf_ibs_handle_irq()
1122 perf_ibs_parse_ld_st_data(event->attr.sample_type, &ibs_data, &data); in perf_ibs_handle_irq()