139 	u16 crtc;		/* CRTC base address */  in vga_set_480_scanlines()  local
142 	crtc = vga_crtc();  in vga_set_480_scanlines()
144 	out_idx(0x0c, crtc, 0x11); /* Vertical sync end, unlock CR0-7 */  in vga_set_480_scanlines()
145 	out_idx(0x0b, crtc, 0x06); /* Vertical total */  in vga_set_480_scanlines()
146 	out_idx(0x3e, crtc, 0x07); /* Vertical overflow */  in vga_set_480_scanlines()
147 	out_idx(0xea, crtc, 0x10); /* Vertical sync start */  in vga_set_480_scanlines()
148 	out_idx(0xdf, crtc, 0x12); /* Vertical display end */  in vga_set_480_scanlines()
149 	out_idx(0xe7, crtc, 0x15); /* Vertical blank start */  in vga_set_480_scanlines()
150 	out_idx(0x04, crtc, 0x16); /* Vertical blank end */  in vga_set_480_scanlines()
159 	u16 crtc;		/* CRTC base address */  in vga_set_vertical_end()  local
163 	crtc = vga_crtc();  in vga_set_vertical_end()
167 	out_idx(ovfw, crtc, 0x07); /* Vertical overflow */  in vga_set_vertical_end()
168 	out_idx(end,  crtc, 0x12); /* Vertical display end */  in vga_set_vertical_end()