Lines Matching +full:1 +full:v8
31 * These are defined in the third layer of macros: op-1.h, op-2.h
33 * of 1,2 and 4 machine words respectively. [For example, on sparc64
35 * constructs in op-1.h, but on sparc32 they use op-2.h definitions.]
47 * SPARC architecture manual V9, and what I really want is V8...
50 * has to be emulated on V8). So I think I'm going to have
86 #define FSQRTQ 0x02b /* v8 */
87 #define FADDQ 0x043 /* v8 */
88 #define FSUBQ 0x047 /* v8 */
89 #define FMULQ 0x04b /* v8 */
90 #define FDIVQ 0x04f /* v8 */
91 #define FDMULQ 0x06e /* v8 */
92 #define FQTOS 0x0c7 /* v8 */
93 #define FQTOD 0x0cb /* v8 */
94 #define FITOQ 0x0cc /* v8 */
95 #define FSTOQ 0x0cd /* v8 */
96 #define FDTOQ 0x0ce /* v8 */
97 #define FQTOI 0x0d3 /* v8 */
98 #define FCMPQ 0x053 /* v8 */
99 #define FCMPEQ 0x057 /* v8 */
140 * This function returns 1 if all queued insns were emulated successfully.
168 perf_sw_event(PERF_COUNT_SW_EMULATION_FAULTS, 1, regs, 0); in do_mathemu()
215 * We return 0 if a SIGFPE should be sent, 1 otherwise.
228 if ((eflag & (eflag - 1)) != 0) { in record_exception()
262 fsr |= (1UL << 14); in record_exception()
266 return (would_trap ? 0 : 1); in record_exception()
280 whether the argument should be packed/unpacked (0 - do not unpack/pack, 1 - unpack/pack) in do_one_mathemu()
281 non-u args tells the size of the argument (0 - no argument, 1 - single, 2 - double, 3 - quad */ in do_one_mathemu()
298 case FSQRTQ: TYPE(3,3,1,3,1,0,0); break; in do_one_mathemu()
302 case FDIVQ: TYPE(3,3,1,3,1,3,1); break; in do_one_mathemu()
303 case FDMULQ: TYPE(3,3,1,2,1,2,1); break; in do_one_mathemu()
304 case FQTOS: TYPE(3,1,1,3,1,0,0); break; in do_one_mathemu()
305 case FQTOD: TYPE(3,2,1,3,1,0,0); break; in do_one_mathemu()
306 case FITOQ: TYPE(3,3,1,1,0,0,0); break; in do_one_mathemu()
307 case FSTOQ: TYPE(3,3,1,1,1,0,0); break; in do_one_mathemu()
308 case FDTOQ: TYPE(3,3,1,2,1,0,0); break; in do_one_mathemu()
309 case FQTOI: TYPE(3,1,0,3,1,0,0); break; in do_one_mathemu()
310 case FSQRTS: TYPE(2,1,1,1,1,0,0); break; in do_one_mathemu()
311 case FSQRTD: TYPE(2,2,1,2,1,0,0); break; in do_one_mathemu()
315 case FDIVD: TYPE(2,2,1,2,1,2,1); break; in do_one_mathemu()
319 case FDIVS: TYPE(2,1,1,1,1,1,1); break; in do_one_mathemu()
320 case FSMULD: TYPE(2,2,1,1,1,1,1); break; in do_one_mathemu()
321 case FDTOS: TYPE(2,1,1,2,1,0,0); break; in do_one_mathemu()
322 case FSTOD: TYPE(2,2,1,1,1,0,0); break; in do_one_mathemu()
323 case FSTOI: TYPE(2,1,0,1,1,0,0); break; in do_one_mathemu()
324 case FDTOI: TYPE(2,1,0,2,1,0,0); break; in do_one_mathemu()
325 case FITOS: TYPE(2,1,1,1,0,0,0); break; in do_one_mathemu()
326 case FITOD: TYPE(2,2,1,1,0,0,0); break; in do_one_mathemu()
329 case FNEGS: TYPE(2,1,0,1,0,0,0); break; in do_one_mathemu()
333 case FCMPS: TYPE(3,0,0,1,1,1,1); break; in do_one_mathemu()
334 case FCMPES: TYPE(3,0,0,1,1,1,1); break; in do_one_mathemu()
335 case FCMPD: TYPE(3,0,0,2,1,2,1); break; in do_one_mathemu()
336 case FCMPED: TYPE(3,0,0,2,1,2,1); break; in do_one_mathemu()
337 case FCMPQ: TYPE(3,0,0,3,1,3,1); break; in do_one_mathemu()
338 case FCMPEQ: TYPE(3,0,0,3,1,3,1); break; in do_one_mathemu()
364 if (freg & 1) { /* doublewords must have bit 5 zeroed */ in do_one_mathemu()
385 if (freg & 1) { /* doublewords must have bit 5 zeroed */ in do_one_mathemu()
399 if (freg) { /* V8 has only one set of condition codes, so */ in do_one_mathemu()
413 if (freg & 1) { /* doublewords must have bit 5 zeroed */ in do_one_mathemu()
418 case 1: in do_one_mathemu()
437 case FSMULD: FP_CONV (D, S, 2, 1, DA, SA); in do_one_mathemu()
438 FP_CONV (D, S, 2, 1, DB, SB); in do_one_mathemu()
456 case FSTOI: FP_TO_INT_S (IR, SB, 32, 1); break; in do_one_mathemu()
457 case FDTOI: FP_TO_INT_D (IR, DB, 32, 1); break; in do_one_mathemu()
458 case FQTOI: FP_TO_INT_Q (IR, QB, 32, 1); break; in do_one_mathemu()
464 case FSTOD: FP_CONV (D, S, 2, 1, DR, SB); break; in do_one_mathemu()
465 case FSTOQ: FP_CONV (Q, S, 4, 1, QR, SB); break; in do_one_mathemu()
467 case FDTOS: FP_CONV (S, D, 1, 2, SR, DB); break; in do_one_mathemu()
468 case FQTOS: FP_CONV (S, Q, 1, 4, SR, QB); break; in do_one_mathemu()
501 if (IR == -1) IR = 2; in do_one_mathemu()
506 case 1: rd->s = IR; break; in do_one_mathemu()
513 return 1; /* success! */ in do_one_mathemu()