Lines Matching refs:dest
43 #define LOAD(type,addr,dest) type [addr], dest argument
47 #define LOAD_BLK(addr,dest) ldda [addr] ASI_BLK_P, dest argument
80 #define MAIN_LOOP_CHUNK(src, dest, fdest, fsrc, jmptgt) \ argument
82 EX_ST_FP(STORE_BLK(%fsrc, %dest), U1_gs_80_fp); \
86 add %dest, 0x40, %dest; \
88 #define LOOP_CHUNK1(src, dest, branch_dest) \ argument
89 MAIN_LOOP_CHUNK(src, dest, f0, f48, branch_dest)
90 #define LOOP_CHUNK2(src, dest, branch_dest) \ argument
91 MAIN_LOOP_CHUNK(src, dest, f16, f48, branch_dest)
92 #define LOOP_CHUNK3(src, dest, branch_dest) \ argument
93 MAIN_LOOP_CHUNK(src, dest, f32, f48, branch_dest)
96 #define STORE_SYNC(dest, fsrc) \ argument
97 EX_ST_FP(STORE_BLK(%fsrc, %dest), U1_gs_80_fp); \
98 add %dest, 0x40, %dest; \
101 #define STORE_JUMP(dest, fsrc, target) \ argument
102 EX_ST_FP(STORE_BLK(%fsrc, %dest), U1_gs_40_fp); \
103 add %dest, 0x40, %dest; \
107 #define FINISH_VISCHUNK(dest, f0, f1) \ argument
111 EX_ST_FP(STORE(std, %f48, %dest), U1_g3_8_fp); \
112 add %dest, 8, %dest;
114 #define UNEVEN_VISCHUNK_LAST(dest, f0, f1) \ argument
119 #define UNEVEN_VISCHUNK(dest, f0, f1) \ argument
120 UNEVEN_VISCHUNK_LAST(dest, f0, f1) \