sparc/lib/M7memset.S

15  * Fast assembler language version of the following C-program for memset
16  * which represents the `standard' for the C-library.
25  *		} while (--n != 0);
34  *	For less than 32 bytes stores, align the address on 4 byte boundary.
35  *	Then store as many 4-byte chunks, followed by trailing bytes.
37  *	For sizes greater than 32 bytes, align the address on 8 byte boundary.
38  *	if (count >= 64) {
39  *      	store 8-bytes chunks to align the address on 64 byte boundary
42  *			64-byte cache line to zero which will also clear the
47  *              	ST_CHUNK cache lines (64 bytes each) before the main
49  *              	In the main loop, continue pre-setting the first long
52  * 			cache line until fewer than ST_CHUNK*64 bytes remain.
56  *       	store remaining data in 64-byte chunks until less than
57  *       	64 bytes remain.
59  *       Store as many 8-byte chunks, followed by trailing bytes.
109 	.size		M7clear_page,.-M7clear_page
110 	.size		M7clear_user_page,.-M7clear_user_page
122 	.size		M7bzero,.-M7bzero
144 	andcc   %o5, 7, %o3             ! is sp1 aligned on a 8 byte bound?
146 	 sub     %o3, 8, %o3             ! -(bytes till long word aligned)
149 	! Set -(%o3) bytes till sp1 long word aligned
150 1:	stb     %o1, [%o5]              ! there is at least 1 byte to set
151 	inccc   %o3                     ! byte clearing loop
157 	cmp     %o2, 64                 ! check if there are 64 bytes to set
163 	 sub     %o3, 64, %o3            ! o3 is -(bytes till block aligned)
166 	! Store -(%o3) bytes till dst is block (64 byte) aligned.
184 	                                ! must be > pre-cleared lines
187 	! initial cache-clearing stores
199 	stxa    %o1, [%o5+8+64]%asi
201 	stxa    %o1, [%o5+8-128]%asi
203 	 stxa    %o1, [%o5+8-64]%asi
205 	sub     %o5, ST_CHUNK*64, %o5	! reset %o5
210 	sub     %o4, 64, %o4
216 	add     %o5, 64, %o5
217 	stxa    %o1, [%o5-8]%asi
221 	! If more than ST_CHUNK*64 bytes remain to set, continue
225 	cmp     %o4, ST_CHUNK*64
238 	subcc   %o4, 64, %o4
240 	add     %o5, 64, %o5
241 	stxa    %o1, [%o5-8]%asi
249 	! For each 64 byte cache line, single STBI to first element
259 	mov     64, %g3
266 	add %g3, 64, %g3
276 	subcc   %o4, 64, %o4
278 	 add     %o5, 64, %o5
287 	cmp     %o4, 64                 ! check if 64 bytes to set
290 4:                                      ! set final blocks of 64 bytes
295 	subcc   %o4, 64, %o4
298 	add     %o5, 64, %o5
299 	stx     %o1, [%o5-16]
301 	 stx     %o1, [%o5-8]
327 	stb     %o1, [%o5]              ! clear a byte
329 	 inc     %o5                     ! next byte
333 	st      %o1, [%o5]              ! 4-byte writing loop
352 	.size		M7memset,.-M7memset