Lines Matching +full:0 +full:x6000000
26 /* The kernel image occupies 0x4000000 to 0x6000000 (4MB --> 96MB).
27 * The page copy blockops can use 0x6000000 to 0x8000000.
28 * The 8K TSB is mapped in the 0x8000000 to 0x8400000 range.
29 * The 4M TSB is mapped in the 0x8400000 to 0x8800000 range.
30 * The PROM resides in an area spanning 0xf0000000 to 0x100000000.
31 * The vmalloc area spans 0x100000000 to 0x200000000.
33 * we place them right before the OBP area from 0x10000000 to 0xf0000000.
34 * There is a single static kernel PMD which maps from 0x0 to address
35 * 0x400000000.
37 #define TLBTEMP_BASE _AC(0x0000000006000000,UL)
38 #define TSBMAP_8K_BASE _AC(0x0000000008000000,UL)
39 #define TSBMAP_4M_BASE _AC(0x0000000008400000,UL)
40 #define MODULES_VADDR _AC(0x0000000010000000,UL)
41 #define MODULES_LEN _AC(0x00000000e0000000,UL)
42 #define MODULES_END _AC(0x00000000f0000000,UL)
43 #define LOW_OBP_ADDRESS _AC(0x00000000f0000000,UL)
44 #define HI_OBP_ADDRESS _AC(0x0000000100000000,UL)
45 #define VMALLOC_START _AC(0x0000000100000000,UL)
101 __FILE__, __LINE__, &(e), pmd_val(e), __builtin_return_address(0))
104 __FILE__, __LINE__, &(e), pud_val(e), __builtin_return_address(0))
107 __FILE__, __LINE__, &(e), pgd_val(e), __builtin_return_address(0))
112 #define _PAGE_VALID _AC(0x8000000000000000,UL) /* Valid TTE */
113 #define _PAGE_R _AC(0x8000000000000000,UL) /* Keep ref bit uptodate*/
114 #define _PAGE_SPECIAL _AC(0x0200000000000000,UL) /* Special page */
115 #define _PAGE_PMD_HUGE _AC(0x0100000000000000,UL) /* Huge page */
119 #define _PAGE_SZ4MB_4U _AC(0x6000000000000000,UL) /* 4MB Page */
120 #define _PAGE_SZ512K_4U _AC(0x4000000000000000,UL) /* 512K Page */
121 #define _PAGE_SZ64K_4U _AC(0x2000000000000000,UL) /* 64K Page */
122 #define _PAGE_SZ8K_4U _AC(0x0000000000000000,UL) /* 8K Page */
123 #define _PAGE_NFO_4U _AC(0x1000000000000000,UL) /* No Fault Only */
124 #define _PAGE_IE_4U _AC(0x0800000000000000,UL) /* Invert Endianness */
125 #define _PAGE_SOFT2_4U _AC(0x07FC000000000000,UL) /* Software bits, set 2 */
126 #define _PAGE_SPECIAL_4U _AC(0x0200000000000000,UL) /* Special page */
127 #define _PAGE_PMD_HUGE_4U _AC(0x0100000000000000,UL) /* Huge page */
128 #define _PAGE_RES1_4U _AC(0x0002000000000000,UL) /* Reserved */
129 #define _PAGE_SZ32MB_4U _AC(0x0001000000000000,UL) /* (Panther) 32MB page */
130 #define _PAGE_SZ256MB_4U _AC(0x2001000000000000,UL) /* (Panther) 256MB page */
131 #define _PAGE_SZALL_4U _AC(0x6001000000000000,UL) /* All pgsz bits */
132 #define _PAGE_SN_4U _AC(0x0000800000000000,UL) /* (Cheetah) Snoop */
133 #define _PAGE_RES2_4U _AC(0x0000780000000000,UL) /* Reserved */
134 #define _PAGE_PADDR_4U _AC(0x000007FFFFFFE000,UL) /* (Cheetah) pa[42:13] */
135 #define _PAGE_SOFT_4U _AC(0x0000000000001F80,UL) /* Software bits: */
136 #define _PAGE_EXEC_4U _AC(0x0000000000001000,UL) /* Executable SW bit */
137 #define _PAGE_MODIFIED_4U _AC(0x0000000000000800,UL) /* Modified (dirty) */
138 #define _PAGE_ACCESSED_4U _AC(0x0000000000000400,UL) /* Accessed (ref'd) */
139 #define _PAGE_READ_4U _AC(0x0000000000000200,UL) /* Readable SW Bit */
140 #define _PAGE_WRITE_4U _AC(0x0000000000000100,UL) /* Writable SW Bit */
141 #define _PAGE_PRESENT_4U _AC(0x0000000000000080,UL) /* Present */
142 #define _PAGE_L_4U _AC(0x0000000000000040,UL) /* Locked TTE */
143 #define _PAGE_CP_4U _AC(0x0000000000000020,UL) /* Cacheable in P-Cache */
144 #define _PAGE_CV_4U _AC(0x0000000000000010,UL) /* Cacheable in V-Cache */
145 #define _PAGE_E_4U _AC(0x0000000000000008,UL) /* side-Effect */
146 #define _PAGE_P_4U _AC(0x0000000000000004,UL) /* Privileged Page */
147 #define _PAGE_W_4U _AC(0x0000000000000002,UL) /* Writable */
150 #define _PAGE_NFO_4V _AC(0x4000000000000000,UL) /* No Fault Only */
151 #define _PAGE_SOFT2_4V _AC(0x3F00000000000000,UL) /* Software bits, set 2 */
152 #define _PAGE_MODIFIED_4V _AC(0x2000000000000000,UL) /* Modified (dirty) */
153 #define _PAGE_ACCESSED_4V _AC(0x1000000000000000,UL) /* Accessed (ref'd) */
154 #define _PAGE_READ_4V _AC(0x0800000000000000,UL) /* Readable SW Bit */
155 #define _PAGE_WRITE_4V _AC(0x0400000000000000,UL) /* Writable SW Bit */
156 #define _PAGE_SPECIAL_4V _AC(0x0200000000000000,UL) /* Special page */
157 #define _PAGE_PMD_HUGE_4V _AC(0x0100000000000000,UL) /* Huge page */
158 #define _PAGE_PADDR_4V _AC(0x00FFFFFFFFFFE000,UL) /* paddr[55:13] */
159 #define _PAGE_IE_4V _AC(0x0000000000001000,UL) /* Invert Endianness */
160 #define _PAGE_E_4V _AC(0x0000000000000800,UL) /* side-Effect */
161 #define _PAGE_CP_4V _AC(0x0000000000000400,UL) /* Cacheable in P-Cache */
162 #define _PAGE_CV_4V _AC(0x0000000000000200,UL) /* Cacheable in V-Cache */
164 #define _PAGE_MCD_4V _AC(0x0000000000000200,UL) /* Memory Corruption */
165 #define _PAGE_P_4V _AC(0x0000000000000100,UL) /* Privileged Page */
166 #define _PAGE_EXEC_4V _AC(0x0000000000000080,UL) /* Executable Page */
167 #define _PAGE_W_4V _AC(0x0000000000000040,UL) /* Writable */
168 #define _PAGE_SOFT_4V _AC(0x0000000000000030,UL) /* Software bits */
169 #define _PAGE_PRESENT_4V _AC(0x0000000000000010,UL) /* Present */
170 #define _PAGE_RESV_4V _AC(0x0000000000000008,UL) /* Reserved */
171 #define _PAGE_SZ16GB_4V _AC(0x0000000000000007,UL) /* 16GB Page */
172 #define _PAGE_SZ2GB_4V _AC(0x0000000000000006,UL) /* 2GB Page */
173 #define _PAGE_SZ256MB_4V _AC(0x0000000000000005,UL) /* 256MB Page */
174 #define _PAGE_SZ32MB_4V _AC(0x0000000000000004,UL) /* 32MB Page */
175 #define _PAGE_SZ4MB_4V _AC(0x0000000000000003,UL) /* 4MB Page */
176 #define _PAGE_SZ512K_4V _AC(0x0000000000000002,UL) /* 512K Page */
177 #define _PAGE_SZ64K_4V _AC(0x0000000000000001,UL) /* 64K Page */
178 #define _PAGE_SZ8K_4V _AC(0x0000000000000000,UL) /* 8K Page */
179 #define _PAGE_SZALL_4V _AC(0x0000000000000007,UL) /* All pgsz bits */
192 #define _PAGE_SWP_EXCLUSIVE _AC(0x0000000000100000, UL)
225 BUILD_BUG_ON(_PAGE_SZBITS_4U != 0UL || _PAGE_SZBITS_4V != 0UL); in pfn_pte()
246 "\n661: sllx %1, %2, %0\n" in pte_pfn()
247 " srlx %0, %3, %0\n" in pte_pfn()
250 " sllx %1, %4, %0\n" in pte_pfn()
251 " srlx %0, %5, %0\n" in pte_pfn()
266 /* SUN4U: 0x630107ffffffec38 (negated == 0x9cfef800000013c7) in pte_modify()
267 * SUN4V: 0x33ffffffffffee07 (negated == 0xcc000000000011f8) in pte_modify()
276 BUILD_BUG_ON(_PAGE_SZBITS_4U != 0UL || _PAGE_SZBITS_4V != 0UL); in pte_modify()
279 " sethi %%hi(%2), %0\n" in pte_modify()
281 " or %0, %%lo(%2), %0\n" in pte_modify()
283 " or %0, %1, %0\n" in pte_modify()
287 " sethi %%hi(%3), %0\n" in pte_modify()
290 " or %0, %%lo(%3), %0\n" in pte_modify()
293 " or %0, %1, %0\n" in pte_modify()
298 " sethi %%hi(%4), %0\n" in pte_modify()
301 " or %0, %%lo(%4), %0\n" in pte_modify()
304 " or %0, %1, %0\n" in pte_modify()
336 "\n661: andn %0, %2, %0\n" in pgprot_noncached()
337 " or %0, %3, %0\n" in pgprot_noncached()
340 " andn %0, %4, %0\n" in pgprot_noncached()
341 " or %0, %5, %0\n" in pgprot_noncached()
345 " andn %0, %6, %0\n" in pgprot_noncached()
346 " or %0, %5, %0\n" in pgprot_noncached()
349 : "0" (val), "i" (_PAGE_CP_4U | _PAGE_CV_4U), "i" (_PAGE_E_4U), in pgprot_noncached()
366 "\n661: mov %1, %0\n" in pte_dirty()
370 " sethi %%uhi(%2), %0\n" in pte_dirty()
371 " sllx %0, 32, %0\n" in pte_dirty()
384 "\n661: mov %1, %0\n" in pte_write()
388 " sethi %%uhi(%2), %0\n" in pte_write()
389 " sllx %0, 32, %0\n" in pte_write()
405 "\n661: sethi %%uhi(%1), %0\n" in __pte_default_huge_mask()
406 " sllx %0, 32, %0\n" in __pte_default_huge_mask()
409 " mov %2, %0\n" in __pte_default_huge_mask()
467 "\n661: or %0, %2, %0\n" in __pte_mkhwwrite()
470 " or %0, %3, %0\n" in __pte_mkhwwrite()
473 : "0" (val), "i" (_PAGE_W_4U), "i" (_PAGE_W_4V)); in __pte_mkhwwrite()
483 "\n661: mov %1, %0\n" in pte_mkdirty()
487 " sethi %%uhi(%2), %0\n" in pte_mkdirty()
488 " sllx %0, 32, %0\n" in pte_mkdirty()
502 "\n661: andn %0, %3, %0\n" in pte_mkclean()
512 " andn %0, %1, %0\n" in pte_mkclean()
515 : "0" (val), "i" (_PAGE_MODIFIED_4U | _PAGE_W_4U), in pte_mkclean()
526 "\n661: mov %1, %0\n" in pte_mkwrite_novma()
530 " sethi %%uhi(%2), %0\n" in pte_mkwrite_novma()
531 " sllx %0, 32, %0\n" in pte_mkwrite_novma()
545 "\n661: andn %0, %3, %0\n" in pte_wrprotect()
555 " andn %0, %1, %0\n" in pte_wrprotect()
558 : "0" (val), "i" (_PAGE_WRITE_4U | _PAGE_W_4U), in pte_wrprotect()
569 "\n661: mov %1, %0\n" in pte_mkold()
573 " sethi %%uhi(%2), %0\n" in pte_mkold()
574 " sllx %0, 32, %0\n" in pte_mkold()
589 "\n661: mov %1, %0\n" in pte_mkyoung()
593 " sethi %%uhi(%2), %0\n" in pte_mkyoung()
594 " sllx %0, 32, %0\n" in pte_mkyoung()
627 "\n661: mov %1, %0\n" in pte_young()
631 " sethi %%uhi(%2), %0\n" in pte_young()
632 " sllx %0, 32, %0\n" in pte_young()
645 "\n661: sethi %%hi(%1), %0\n" in pte_exec()
648 " mov %2, %0\n" in pte_exec()
661 "\n661: and %0, %2, %0\n" in pte_present()
664 " and %0, %3, %0\n" in pte_present()
667 : "0" (val), "i" (_PAGE_PRESENT_4U), "i" (_PAGE_PRESENT_4V)); in pte_present()
795 return pmd_val(pmd) != 0UL; in pmd_present()
858 #define pmd_clear(pmdp) (pmd_val(*(pmdp)) = 0UL)
859 #define pud_present(pud) (pud_val(pud) != 0U)
860 #define pud_clear(pudp) (pud_val(*(pudp)) = 0UL)
863 #define p4d_present(p4d) (p4d_val(p4d) != 0U)
864 #define p4d_clear(p4dp) (p4d_val(*(p4dp)) = 0UL)
918 set_pmd_at(mm, addr, pmdp, __pmd(0UL)); in pmdp_huge_get_and_clear()
936 __set_pte_at(mm, addr, ptep, pte, 0); in set_ptes()
937 if (--nr == 0) in set_ptes()
948 set_pte_at((mm), (addr), (ptep), __pte(0UL))
952 __set_pte_at((mm), (addr), (ptep), __pte(0UL), (fullmm))
1007 * 3 2 1 0 9 8 7 6 5 4 3 2 1 0 9 8 7 6 5 4 3 2 1 0 9 8 7 6 5 4 3 2
1011 * 1 0 9 8 7 6 5 4 3 2 1 0 9 8 7 6 5 4 3 2 1 0 9 8 7 6 5 4 3 2 1 0
1014 #define __swp_type(entry) (((entry).val >> PAGE_SHIFT) & 0x7fUL)
1019 ((((long)(type) & 0x7fUL) << PAGE_SHIFT) | \
1048 #define GET_PFN(pfn) (pfn & 0x0fffffffffffffffUL)
1083 return 0; in arch_unmap_one()