Lines Matching +full:disable +full:- +full:timing +full:- +full:generator

1 /* SPDX-License-Identifier: GPL-2.0 */
3 * bbc.h: Defines for BootBus Controller found on UltraSPARC-III
12 /* Register sizes are indicated by "B" (Byte, 1-byte),
13 * "H" (Half-word, 2 bytes), "W" (Word, 4 bytes) or
29 #define BBC_ES_DACT 0x14 /* [B] E* De-Assert Change Time */
30 #define BBC_ES_DABT 0x15 /* [B] E* De-Assert Bypass Time */
34 #define BBC_EBUST 0x20 /* [Q] EBUS Timing */
38 #define BBC_I2C_0_S1 0x2e /* [B] I2C ctrlr-0 reg S1 */
39 #define BBC_I2C_0_S0 0x2f /* [B] I2C ctrlr-0 regs S0,S0',S2,S3*/
40 #define BBC_I2C_1_S1 0x30 /* [B] I2C ctrlr-1 reg S1 */
41 #define BBC_I2C_1_S0 0x31 /* [B] I2C ctrlr-1 regs S0,S0',S2,S3*/
83 #define BBC_QUIESCE_FD0 0x10 /* Disable Fatal_Error[0] reporting */
84 #define BBC_QUIESCE_FD1 0x20 /* Disable Fatal_Error[1] reporting */
85 #define BBC_QUIESCE_FD2 0x40 /* Disable Fatal_Error[2] reporting */
86 #define BBC_QUIESCE_FD3 0x80 /* Disable Fatal_Error[3] reporting */
127 #define BBC_PSRC_BUTTON 0x0040 /* System reset via push-button dongle */
128 #define BBC_PSRC_PWRUP 0x0080 /* System reset via power-up */
136 #define BBC_PSRC_SYNTH 0x8000 /* System reset when on-board clock synthesizers
158 /* Clock Synthesizers Control register. This register provides the big-bang
198 * de-assertion of CLK_CHANGE_L[2:0] and the de-assertion of the FREEZE_L
204 * BBC clocks between the de-assertion of CLK_CHANGE_L[2:0] and the first
215 /* Keyboard Beep Counter register. There is a free-running counter inside
219 * generator automatically selects a different bit to use if the system clock