sh/kernel/disassemble.c

18 	HEX_0, HEX_1, HEX_2, HEX_3, HEX_4, HEX_5, HEX_6, HEX_7,  enumerator
77 	{"cmp/pl",{A_REG_N},{HEX_4,REG_N,HEX_1,HEX_5}},
78 	{"cmp/pz",{A_REG_N},{HEX_4,REG_N,HEX_1,HEX_1}},
81 	{"div0u",{0},{HEX_0,HEX_0,HEX_1,HEX_9}},
90 	{"ldc",{A_REG_N,A_GBR},{HEX_4,REG_N,HEX_1,HEX_E}},
97 	{"ldc.l",{A_INC_N,A_GBR},{HEX_4,REG_N,HEX_1,HEX_7}},
104 	{"lds",{A_REG_N,A_MACL},{HEX_4,REG_N,HEX_1,HEX_A}},
109 	{"lds.l",{A_INC_N,A_MACL},{HEX_4,REG_N,HEX_1,HEX_6}},
127 	{"mov.l",{ A_REG_M,A_DISP_REG_N},{HEX_1,REG_N,REG_M,IMM_4BY4}},
140 	{"mov.w",{ A_REG_M,A_IND_N},{HEX_2,REG_N,REG_M,HEX_1}},
146 	{"mov.w",{A_IND_M,A_REG_N},{HEX_6,REG_N,REG_M,HEX_1}},
147 	{"mov.w",{A_R0,A_DISP_REG_M},{HEX_8,HEX_1,REG_M,IMM_4BY2}},
148 	{"mov.w",{A_R0,A_DISP_GBR},{HEX_C,HEX_1,IMM_8BY2}},
173 	{"sett",{0},{HEX_0,HEX_0,HEX_1,HEX_8}},
177 	{"shar",{A_REG_N},{HEX_4,REG_N,HEX_2,HEX_1}},
181 	{"shll8",{A_REG_N},{HEX_4,REG_N,HEX_1,HEX_8}},
182 	{"shlr",{A_REG_N},{HEX_4,REG_N,HEX_0,HEX_1}},
185 	{"shlr8",{A_REG_N},{HEX_4,REG_N,HEX_1,HEX_9}},
186 	{"sleep",{0},{HEX_0,HEX_0,HEX_1,HEX_B}},
188 	{"stc",{A_GBR,A_REG_N},{HEX_0,REG_N,HEX_1,HEX_2}},
196 	{"stc.l",{A_GBR,A_DEC_N},{HEX_4,REG_N,HEX_1,HEX_3}},
204 	{"sts",{A_MACL,A_REG_N},{HEX_0,REG_N,HEX_1,HEX_A}},
209 	{"sts.l",{A_MACL,A_DEC_N},{HEX_4,REG_N,HEX_1,HEX_2}},
218 	{"tas.b",{A_IND_N},{HEX_4,REG_N,HEX_1,HEX_B}},
228 	{"dt",{A_REG_N},{HEX_4,REG_N,HEX_1,HEX_0}},
248 	{"flds",{F_REG_N,FPUL_M},{HEX_F,REG_N,HEX_1,HEX_D}},
284 	{"fsub",{F_REG_M,F_REG_N},{HEX_F,REG_N,REG_M,HEX_1}},
285 	{"fsub",{D_REG_M,D_REG_N},{HEX_F,REG_N,REG_M,HEX_1}},