Lines Matching +full:0 +full:x3c00
33 #define LAN9115_READY (__raw_readl(0xA8000084UL) & 0x00000001UL)
43 for (i = 0; i < 10; ++i) { in ethernet_reset_finished()
49 return 0; in ethernet_reset_finished()
55 CLRBITS_OUTB(0x10, PORT_PMDR); in reset_ethernet()
60 SETBITS_OUTB(0x10, PORT_PMDR); in reset_ethernet()
65 /* CS2: LAN (0x08000000 - 0x0bffffff) */ in setup_chip_select()
67 __raw_writel(0x36db0400, CS2BCR); in setup_chip_select()
69 __raw_writel(0x000003c0, CS2WCR); in setup_chip_select()
71 /* CS4: CAN1 (0xb0000000 - 0xb3ffffff) */ in setup_chip_select()
73 __raw_writel(0x00000200, CS4BCR); in setup_chip_select()
75 __raw_writel(0x00100981, CS4WCR); in setup_chip_select()
77 /* CS5a: CAN2 (0xb4000000 - 0xb5ffffff) */ in setup_chip_select()
79 __raw_writel(0x00000200, CS5ABCR); in setup_chip_select()
81 __raw_writel(0x00100981, CS5AWCR); in setup_chip_select()
83 /* CS5b: CAN3 (0xb6000000 - 0xb7ffffff) */ in setup_chip_select()
85 __raw_writel(0x00000200, CS5BBCR); in setup_chip_select()
87 __raw_writel(0x00100981, CS5BWCR); in setup_chip_select()
89 /* CS6a: Rotary (0xb8000000 - 0xb9ffffff) */ in setup_chip_select()
91 __raw_writel(0x00000200, CS6ABCR); in setup_chip_select()
93 __raw_writel(0x001009C1, CS6AWCR); in setup_chip_select()
101 __raw_writew(0x5555, PORT_PACR); /* 01 01 01 01 01 01 01 01 */ in setup_port_multiplexing()
106 __raw_writew(0x5555, PORT_PBCR); /* 01 01 01 01 01 01 01 01 */ in setup_port_multiplexing()
111 __raw_writew(0x5500, PORT_PCCR); /* 01 01 01 01 00 00 00 00 */ in setup_port_multiplexing()
116 __raw_writew(0x5555, PORT_PDCR); /* 01 01 01 01 01 01 01 01 */ in setup_port_multiplexing()
121 __raw_writew(0x3C00, PORT_PECR); /* 00 11 11 00 00 00 00 00 */ in setup_port_multiplexing()
126 __raw_writew(0x0002, PORT_PFCR); /* 00 00 00 00 00 00 00 10 */ in setup_port_multiplexing()
131 __raw_writew(0x03D5, PORT_PGCR); /* 00 00 00 11 11 01 01 01 */ in setup_port_multiplexing()
136 __raw_writew(0x0050, PORT_PHCR); /* 00 00 00 00 01 01 00 00 */ in setup_port_multiplexing()
141 __raw_writew(0x0000, PORT_PJCR); /* 00 00 00 00 00 00 00 00 */ in setup_port_multiplexing()
146 __raw_writew(0x00FF, PORT_PKCR); /* 00 00 00 00 11 11 11 11 */ in setup_port_multiplexing()
151 __raw_writew(0x0000, PORT_PLCR); /* 00 00 00 00 00 00 00 00 */ in setup_port_multiplexing()
157 __raw_writew(0x5552, PORT_PMCR); /* 01 01 01 01 01 01 00 10 */ in setup_port_multiplexing()
163 __raw_writeb(0x30, PORT_PMDR); in setup_port_multiplexing()
165 __raw_writeb(0xF0, PORT_PMDR); in setup_port_multiplexing()
174 __raw_writew(0x0100, PORT_PPCR); /* 00 00 00 01 00 00 00 00 */ in setup_port_multiplexing()
175 __raw_writeb(0x10, PORT_PPDR); in setup_port_multiplexing()
192 __raw_writew(0x0140, PORT_PSCR); /* 00 00 00 01 01 00 00 00 */ in setup_port_multiplexing()
197 __raw_writew(0x0001, PORT_PTCR); /* 00 00 00 00 00 00 00 01 */ in setup_port_multiplexing()
202 __raw_writew(0x0240, PORT_PUCR); /* 00 00 00 10 01 00 00 00 */ in setup_port_multiplexing()
207 __raw_writew(0x0142, PORT_PVCR); /* 00 00 00 01 01 00 00 10 */ in setup_port_multiplexing()
216 __raw_writew(0xAABC, PORT_PSELA); in mpr2_setup()
221 __raw_writew(0x3C00, PORT_PSELB); in mpr2_setup()
225 __raw_writew(0x0000, PORT_PSELC); in mpr2_setup()
229 __raw_writew(0x0000, PORT_PSELD); in mpr2_setup()
231 __raw_writew(0x0101, PORT_UTRCTL); in mpr2_setup()
233 __raw_writew(0xA5C0, PORT_UCLKCR_W); in mpr2_setup()
244 if (ethernet_reset_finished() == 0) in mpr2_setup()
249 [0] = {
250 .start = 0xa8000000,
251 .end = 0xabffffff,
255 .start = evt2irq(0x660),
256 .end = evt2irq(0x660),
279 [0] = {
304 .offset = 0x00000000UL,
329 .start = 0x00000000,
330 .end = 0x2000000UL,
357 regulator_register_fixed(0, dummy_supplies, ARRAY_SIZE(dummy_supplies)); in mpr2_devices_setup()
370 irq_set_irq_type(evt2irq(0x600), IRQ_TYPE_LEVEL_LOW); /* IRQ0 CAN1 */ in init_mpr2_IRQ()
371 irq_set_irq_type(evt2irq(0x620), IRQ_TYPE_LEVEL_LOW); /* IRQ1 CAN2 */ in init_mpr2_IRQ()
372 irq_set_irq_type(evt2irq(0x640), IRQ_TYPE_LEVEL_LOW); /* IRQ2 CAN3 */ in init_mpr2_IRQ()
373 irq_set_irq_type(evt2irq(0x660), IRQ_TYPE_LEVEL_LOW); /* IRQ3 SMSC9115 */ in init_mpr2_IRQ()
374 irq_set_irq_type(evt2irq(0x680), IRQ_TYPE_EDGE_RISING); /* IRQ4 touchscreen */ in init_mpr2_IRQ()
375 irq_set_irq_type(evt2irq(0x6a0), IRQ_TYPE_EDGE_FALLING); /* IRQ5 touchscreen */ in init_mpr2_IRQ()
377 intc_set_priority(evt2irq(0x600), 13); /* IRQ0 CAN1 */ in init_mpr2_IRQ()
378 intc_set_priority(evt2irq(0x620), 13); /* IRQ0 CAN2 */ in init_mpr2_IRQ()
379 intc_set_priority(evt2irq(0x640), 13); /* IRQ0 CAN3 */ in init_mpr2_IRQ()
380 intc_set_priority(evt2irq(0x660), 6); /* IRQ3 SMSC9115 */ in init_mpr2_IRQ()