Lines Matching refs:REG_2
72 #define REG_2 BPF_REG_1 /* Register 2 */ macro
648 EMIT4(0xb9040000, REG_2, BPF_REG_0); in bpf_jit_epilogue()
1453 EMIT4(0xb9040000, BPF_REG_0, REG_2); in bpf_jit_insn()
2130 load_imm64(jit, REG_2, (u64)p); in invoke_bpf_prog()
2136 EMIT4(0xb9020000, REG_7, REG_2); in invoke_bpf_prog()
2148 EMIT4_DISP(0x41000000, REG_2, REG_15, tjit->bpf_args_off); in invoke_bpf_prog()
2156 if (sign_extend(jit, REG_2, m->ret_size, m->ret_flags)) in invoke_bpf_prog()
2158 EMIT6_DISP_LH(0xe3000000, 0x0024, REG_2, REG_0, REG_15, in invoke_bpf_prog()
2173 load_imm64(jit, REG_2, (u64)p); in invoke_bpf_prog()
2287 EMIT6_DISP_LH(0xeb000000, 0x0024, REG_2, in __arch_prepare_bpf_trampoline()
2288 REG_2 + (nr_reg_args - 1), REG_15, in __arch_prepare_bpf_trampoline()
2292 arg = REG_2 + i; in __arch_prepare_bpf_trampoline()
2369 load_imm64(jit, REG_2, (u64)im); in __arch_prepare_bpf_trampoline()
2412 EMIT6_DISP_LH(0xeb000000, 0x0004, REG_2, in __arch_prepare_bpf_trampoline()
2413 REG_2 + (nr_reg_args - 1), REG_15, in __arch_prepare_bpf_trampoline()
2428 EMIT6_DISP_LH(0xe3000000, 0x0024, REG_2, REG_0, REG_15, in __arch_prepare_bpf_trampoline()
2457 load_imm64(jit, REG_2, (u64)im); in __arch_prepare_bpf_trampoline()
2464 EMIT6_DISP_LH(0xeb000000, 0x0004, REG_2, in __arch_prepare_bpf_trampoline()
2465 REG_2 + (nr_reg_args - 1), REG_15, in __arch_prepare_bpf_trampoline()
2477 EMIT6_DISP_LH(0xe3000000, 0x0004, REG_2, REG_0, REG_15, in __arch_prepare_bpf_trampoline()