1 // SPDX-License-Identifier: GPL-2.0
22 #define KVM_ISA_EXT_ARR(ext)		\  argument
23 [KVM_RISCV_ISA_EXT_##ext] = RISCV_ISA_EXT_##ext
66 static bool kvm_riscv_vcpu_isa_enable_allowed(unsigned long ext)  in kvm_riscv_vcpu_isa_enable_allowed()  argument
68 	switch (ext) {  in kvm_riscv_vcpu_isa_enable_allowed()
80 static bool kvm_riscv_vcpu_isa_disable_allowed(unsigned long ext)  in kvm_riscv_vcpu_isa_disable_allowed()  argument
82 	switch (ext) {  in kvm_riscv_vcpu_isa_disable_allowed()
115 			set_bit(host_isa, vcpu->arch.isa);  in kvm_riscv_vcpu_setup_isa()
123 			(unsigned long __user *)(unsigned long)reg->addr;  in kvm_riscv_vcpu_get_reg_config()
124 	unsigned long reg_num = reg->id & ~(KVM_REG_ARCH_MASK |  in kvm_riscv_vcpu_get_reg_config()
129 	if (KVM_REG_SIZE(reg->id) != sizeof(unsigned long))  in kvm_riscv_vcpu_get_reg_config()
130 		return -EINVAL;  in kvm_riscv_vcpu_get_reg_config()
134 		reg_val = vcpu->arch.isa[0] & KVM_RISCV_BASE_ISA_MASK;  in kvm_riscv_vcpu_get_reg_config()
137 		if (!riscv_isa_extension_available(vcpu->arch.isa, ZICBOM))  in kvm_riscv_vcpu_get_reg_config()
138 			return -ENOENT;  in kvm_riscv_vcpu_get_reg_config()
142 		if (!riscv_isa_extension_available(vcpu->arch.isa, ZICBOZ))  in kvm_riscv_vcpu_get_reg_config()
143 			return -ENOENT;  in kvm_riscv_vcpu_get_reg_config()
147 		reg_val = vcpu->arch.mvendorid;  in kvm_riscv_vcpu_get_reg_config()
150 		reg_val = vcpu->arch.marchid;  in kvm_riscv_vcpu_get_reg_config()
153 		reg_val = vcpu->arch.mimpid;  in kvm_riscv_vcpu_get_reg_config()
159 		return -ENOENT;  in kvm_riscv_vcpu_get_reg_config()
162 	if (copy_to_user(uaddr, &reg_val, KVM_REG_SIZE(reg->id)))  in kvm_riscv_vcpu_get_reg_config()
163 		return -EFAULT;  in kvm_riscv_vcpu_get_reg_config()
172 			(unsigned long __user *)(unsigned long)reg->addr;  in kvm_riscv_vcpu_set_reg_config()
173 	unsigned long reg_num = reg->id & ~(KVM_REG_ARCH_MASK |  in kvm_riscv_vcpu_set_reg_config()
178 	if (KVM_REG_SIZE(reg->id) != sizeof(unsigned long))  in kvm_riscv_vcpu_set_reg_config()
179 		return -EINVAL;  in kvm_riscv_vcpu_set_reg_config()
181 	if (copy_from_user(&reg_val, uaddr, KVM_REG_SIZE(reg->id)))  in kvm_riscv_vcpu_set_reg_config()
182 		return -EFAULT;  in kvm_riscv_vcpu_set_reg_config()
191 			return -EINVAL;  in kvm_riscv_vcpu_set_reg_config()
197 		if (reg_val == (vcpu->arch.isa[0] & KVM_RISCV_BASE_ISA_MASK))  in kvm_riscv_vcpu_set_reg_config()
200 		if (!vcpu->arch.ran_atleast_once) {  in kvm_riscv_vcpu_set_reg_config()
217 			reg_val = (vcpu->arch.isa[0] & ~KVM_RISCV_BASE_ISA_MASK) |  in kvm_riscv_vcpu_set_reg_config()
219 			vcpu->arch.isa[0] = reg_val;  in kvm_riscv_vcpu_set_reg_config()
222 			return -EBUSY;  in kvm_riscv_vcpu_set_reg_config()
226 		if (!riscv_isa_extension_available(vcpu->arch.isa, ZICBOM))  in kvm_riscv_vcpu_set_reg_config()
227 			return -ENOENT;  in kvm_riscv_vcpu_set_reg_config()
229 			return -EINVAL;  in kvm_riscv_vcpu_set_reg_config()
232 		if (!riscv_isa_extension_available(vcpu->arch.isa, ZICBOZ))  in kvm_riscv_vcpu_set_reg_config()
233 			return -ENOENT;  in kvm_riscv_vcpu_set_reg_config()
235 			return -EINVAL;  in kvm_riscv_vcpu_set_reg_config()
238 		if (reg_val == vcpu->arch.mvendorid)  in kvm_riscv_vcpu_set_reg_config()
240 		if (!vcpu->arch.ran_atleast_once)  in kvm_riscv_vcpu_set_reg_config()
241 			vcpu->arch.mvendorid = reg_val;  in kvm_riscv_vcpu_set_reg_config()
243 			return -EBUSY;  in kvm_riscv_vcpu_set_reg_config()
246 		if (reg_val == vcpu->arch.marchid)  in kvm_riscv_vcpu_set_reg_config()
248 		if (!vcpu->arch.ran_atleast_once)  in kvm_riscv_vcpu_set_reg_config()
249 			vcpu->arch.marchid = reg_val;  in kvm_riscv_vcpu_set_reg_config()
251 			return -EBUSY;  in kvm_riscv_vcpu_set_reg_config()
254 		if (reg_val == vcpu->arch.mimpid)  in kvm_riscv_vcpu_set_reg_config()
256 		if (!vcpu->arch.ran_atleast_once)  in kvm_riscv_vcpu_set_reg_config()
257 			vcpu->arch.mimpid = reg_val;  in kvm_riscv_vcpu_set_reg_config()
259 			return -EBUSY;  in kvm_riscv_vcpu_set_reg_config()
263 			return -EINVAL;  in kvm_riscv_vcpu_set_reg_config()
266 		return -ENOENT;  in kvm_riscv_vcpu_set_reg_config()
275 	struct kvm_cpu_context *cntx = &vcpu->arch.guest_context;  in kvm_riscv_vcpu_get_reg_core()
277 			(unsigned long __user *)(unsigned long)reg->addr;  in kvm_riscv_vcpu_get_reg_core()
278 	unsigned long reg_num = reg->id & ~(KVM_REG_ARCH_MASK |  in kvm_riscv_vcpu_get_reg_core()
283 	if (KVM_REG_SIZE(reg->id) != sizeof(unsigned long))  in kvm_riscv_vcpu_get_reg_core()
284 		return -EINVAL;  in kvm_riscv_vcpu_get_reg_core()
286 		return -ENOENT;  in kvm_riscv_vcpu_get_reg_core()
288 	if (reg_num == KVM_REG_RISCV_CORE_REG(regs.pc))  in kvm_riscv_vcpu_get_reg_core()
289 		reg_val = cntx->sepc;  in kvm_riscv_vcpu_get_reg_core()
290 	else if (KVM_REG_RISCV_CORE_REG(regs.pc) < reg_num &&  in kvm_riscv_vcpu_get_reg_core()
291 		 reg_num <= KVM_REG_RISCV_CORE_REG(regs.t6))  in kvm_riscv_vcpu_get_reg_core()
294 		reg_val = (cntx->sstatus & SR_SPP) ?  in kvm_riscv_vcpu_get_reg_core()
297 		return -ENOENT;  in kvm_riscv_vcpu_get_reg_core()
299 	if (copy_to_user(uaddr, &reg_val, KVM_REG_SIZE(reg->id)))  in kvm_riscv_vcpu_get_reg_core()
300 		return -EFAULT;  in kvm_riscv_vcpu_get_reg_core()
308 	struct kvm_cpu_context *cntx = &vcpu->arch.guest_context;  in kvm_riscv_vcpu_set_reg_core()
310 			(unsigned long __user *)(unsigned long)reg->addr;  in kvm_riscv_vcpu_set_reg_core()
311 	unsigned long reg_num = reg->id & ~(KVM_REG_ARCH_MASK |  in kvm_riscv_vcpu_set_reg_core()
316 	if (KVM_REG_SIZE(reg->id) != sizeof(unsigned long))  in kvm_riscv_vcpu_set_reg_core()
317 		return -EINVAL;  in kvm_riscv_vcpu_set_reg_core()
319 		return -ENOENT;  in kvm_riscv_vcpu_set_reg_core()
321 	if (copy_from_user(&reg_val, uaddr, KVM_REG_SIZE(reg->id)))  in kvm_riscv_vcpu_set_reg_core()
322 		return -EFAULT;  in kvm_riscv_vcpu_set_reg_core()
324 	if (reg_num == KVM_REG_RISCV_CORE_REG(regs.pc))  in kvm_riscv_vcpu_set_reg_core()
325 		cntx->sepc = reg_val;  in kvm_riscv_vcpu_set_reg_core()
326 	else if (KVM_REG_RISCV_CORE_REG(regs.pc) < reg_num &&  in kvm_riscv_vcpu_set_reg_core()
327 		 reg_num <= KVM_REG_RISCV_CORE_REG(regs.t6))  in kvm_riscv_vcpu_set_reg_core()
331 			cntx->sstatus |= SR_SPP;  in kvm_riscv_vcpu_set_reg_core()
333 			cntx->sstatus &= ~SR_SPP;  in kvm_riscv_vcpu_set_reg_core()
335 		return -ENOENT;  in kvm_riscv_vcpu_set_reg_core()
344 	struct kvm_vcpu_csr *csr = &vcpu->arch.guest_csr;  in kvm_riscv_vcpu_general_get_csr()
347 		return -ENOENT;  in kvm_riscv_vcpu_general_get_csr()
351 		*out_val = (csr->hvip >> VSIP_TO_HVIP_SHIFT) & VSIP_VALID_MASK;  in kvm_riscv_vcpu_general_get_csr()
352 		*out_val |= csr->hvip & ~IRQ_LOCAL_MASK;  in kvm_riscv_vcpu_general_get_csr()
363 	struct kvm_vcpu_csr *csr = &vcpu->arch.guest_csr;  in kvm_riscv_vcpu_general_set_csr()
366 		return -ENOENT;  in kvm_riscv_vcpu_general_set_csr()
376 		WRITE_ONCE(vcpu->arch.irqs_pending_mask[0], 0);  in kvm_riscv_vcpu_general_set_csr()
386 			(unsigned long __user *)(unsigned long)reg->addr;  in kvm_riscv_vcpu_get_reg_csr()
387 	unsigned long reg_num = reg->id & ~(KVM_REG_ARCH_MASK |  in kvm_riscv_vcpu_get_reg_csr()
392 	if (KVM_REG_SIZE(reg->id) != sizeof(unsigned long))  in kvm_riscv_vcpu_get_reg_csr()
393 		return -EINVAL;  in kvm_riscv_vcpu_get_reg_csr()
405 		rc = -ENOENT;  in kvm_riscv_vcpu_get_reg_csr()
411 	if (copy_to_user(uaddr, &reg_val, KVM_REG_SIZE(reg->id)))  in kvm_riscv_vcpu_get_reg_csr()
412 		return -EFAULT;  in kvm_riscv_vcpu_get_reg_csr()
422 			(unsigned long __user *)(unsigned long)reg->addr;  in kvm_riscv_vcpu_set_reg_csr()
423 	unsigned long reg_num = reg->id & ~(KVM_REG_ARCH_MASK |  in kvm_riscv_vcpu_set_reg_csr()
428 	if (KVM_REG_SIZE(reg->id) != sizeof(unsigned long))  in kvm_riscv_vcpu_set_reg_csr()
429 		return -EINVAL;  in kvm_riscv_vcpu_set_reg_csr()
431 	if (copy_from_user(&reg_val, uaddr, KVM_REG_SIZE(reg->id)))  in kvm_riscv_vcpu_set_reg_csr()
432 		return -EFAULT;  in kvm_riscv_vcpu_set_reg_csr()
444 		rc = -ENOENT;  in kvm_riscv_vcpu_set_reg_csr()
461 		return -ENOENT;  in riscv_vcpu_get_isa_ext_single()
465 		return -ENOENT;  in riscv_vcpu_get_isa_ext_single()
468 	if (__riscv_isa_extension_available(vcpu->arch.isa, host_isa_ext))  in riscv_vcpu_get_isa_ext_single()
482 		return -ENOENT;  in riscv_vcpu_set_isa_ext_single()
486 		return -ENOENT;  in riscv_vcpu_set_isa_ext_single()
488 	if (reg_val == test_bit(host_isa_ext, vcpu->arch.isa))  in riscv_vcpu_set_isa_ext_single()
491 	if (!vcpu->arch.ran_atleast_once) {  in riscv_vcpu_set_isa_ext_single()
493 		 * All multi-letter extension and a few single letter  in riscv_vcpu_set_isa_ext_single()
498 			set_bit(host_isa_ext, vcpu->arch.isa);  in riscv_vcpu_set_isa_ext_single()
501 			clear_bit(host_isa_ext, vcpu->arch.isa);  in riscv_vcpu_set_isa_ext_single()
503 			return -EINVAL;  in riscv_vcpu_set_isa_ext_single()
506 		return -EBUSY;  in riscv_vcpu_set_isa_ext_single()
519 		return -ENOENT;  in riscv_vcpu_get_isa_ext_multi()
542 		return -ENOENT;  in riscv_vcpu_set_isa_ext_multi()
560 			(unsigned long __user *)(unsigned long)reg->addr;  in kvm_riscv_vcpu_get_reg_isa_ext()
561 	unsigned long reg_num = reg->id & ~(KVM_REG_ARCH_MASK |  in kvm_riscv_vcpu_get_reg_isa_ext()
566 	if (KVM_REG_SIZE(reg->id) != sizeof(unsigned long))  in kvm_riscv_vcpu_get_reg_isa_ext()
567 		return -EINVAL;  in kvm_riscv_vcpu_get_reg_isa_ext()
584 		rc = -ENOENT;  in kvm_riscv_vcpu_get_reg_isa_ext()
589 	if (copy_to_user(uaddr, &reg_val, KVM_REG_SIZE(reg->id)))  in kvm_riscv_vcpu_get_reg_isa_ext()
590 		return -EFAULT;  in kvm_riscv_vcpu_get_reg_isa_ext()
599 			(unsigned long __user *)(unsigned long)reg->addr;  in kvm_riscv_vcpu_set_reg_isa_ext()
600 	unsigned long reg_num = reg->id & ~(KVM_REG_ARCH_MASK |  in kvm_riscv_vcpu_set_reg_isa_ext()
605 	if (KVM_REG_SIZE(reg->id) != sizeof(unsigned long))  in kvm_riscv_vcpu_set_reg_isa_ext()
606 		return -EINVAL;  in kvm_riscv_vcpu_set_reg_isa_ext()
611 	if (copy_from_user(&reg_val, uaddr, KVM_REG_SIZE(reg->id)))  in kvm_riscv_vcpu_set_reg_isa_ext()
612 		return -EFAULT;  in kvm_riscv_vcpu_set_reg_isa_ext()
622 		return -ENOENT;  in kvm_riscv_vcpu_set_reg_isa_ext()
643 			!riscv_isa_extension_available(vcpu->arch.isa, ZICBOM))  in copy_config_reg_indices()
646 			!riscv_isa_extension_available(vcpu->arch.isa, ZICBOZ))  in copy_config_reg_indices()
654 				return -EFAULT;  in copy_config_reg_indices()
685 				return -EFAULT;  in copy_core_reg_indices()
697 	if (riscv_isa_extension_available(vcpu->arch.isa, SSAIA))  in num_csr_regs()
709 	/* copy general csr regs */  in copy_csr_reg_indices()
718 				return -EFAULT;  in copy_csr_reg_indices()
723 	/* copy AIA csr regs */  in copy_csr_reg_indices()
724 	if (riscv_isa_extension_available(vcpu->arch.isa, SSAIA)) {  in copy_csr_reg_indices()
735 					return -EFAULT;  in copy_csr_reg_indices()
759 				return -EFAULT;  in copy_timer_reg_indices()
769 	const struct kvm_cpu_context *cntx = &vcpu->arch.guest_context;  in num_fp_f_regs()
771 	if (riscv_isa_extension_available(vcpu->arch.isa, f))  in num_fp_f_regs()
772 		return sizeof(cntx->fp.f) / sizeof(u32);  in num_fp_f_regs()
788 				return -EFAULT;  in copy_fp_f_reg_indices()
798 	const struct kvm_cpu_context *cntx = &vcpu->arch.guest_context;  in num_fp_d_regs()
800 	if (riscv_isa_extension_available(vcpu->arch.isa, d))  in num_fp_d_regs()
801 		return sizeof(cntx->fp.d.f) / sizeof(u64) + 1;  in num_fp_d_regs()
814 	for (i = 0; i < n-1; i++) {  in copy_fp_d_reg_indices()
820 				return -EFAULT;  in copy_fp_d_reg_indices()
829 			return -EFAULT;  in copy_fp_d_reg_indices()
853 				return -EFAULT;  in copy_isa_ext_reg_indices()
891 				return -EFAULT;  in copy_sbi_ext_reg_indices()
906 				return -EFAULT;  in copy_sbi_ext_reg_indices()
915 				return -EFAULT;  in copy_sbi_ext_reg_indices()
924  * kvm_riscv_vcpu_num_regs - how many registers do we present via KVM_GET/SET_ONE_REG
945  * kvm_riscv_vcpu_copy_reg_indices - get indices of all registers.
997 	switch (reg->id & KVM_REG_RISCV_TYPE_MASK) {  in kvm_riscv_vcpu_set_reg()
1022 	return -ENOENT;  in kvm_riscv_vcpu_set_reg()
1028 	switch (reg->id & KVM_REG_RISCV_TYPE_MASK) {  in kvm_riscv_vcpu_get_reg()
1053 	return -ENOENT;  in kvm_riscv_vcpu_get_reg()