157 	utrap.sepc = vcpu->arch.guest_context.sepc;  in truly_illegal_insn()
173 	utrap.sepc = vcpu->arch.guest_context.sepc;  in truly_virtual_insn()
234 	if (vcpu->arch.csr_decode.return_handled)  in kvm_riscv_vcpu_csr_return()
236 	vcpu->arch.csr_decode.return_handled = 1;  in kvm_riscv_vcpu_csr_return()
239 	insn = vcpu->arch.csr_decode.insn;  in kvm_riscv_vcpu_csr_return()
241 		SET_RD(insn, &vcpu->arch.guest_context,  in kvm_riscv_vcpu_csr_return()
245 	vcpu->arch.guest_context.sepc += INSN_LEN(insn);  in kvm_riscv_vcpu_csr_return()
255 	ulong rs1_val = GET_RS1(insn, &vcpu->arch.guest_context);  in csr_insn()
290 	vcpu->arch.csr_decode.insn = insn;  in csr_insn()
291 	vcpu->arch.csr_decode.return_handled = 0;  in csr_insn()
390 		vcpu->arch.guest_context.sepc += INSN_LEN(insn);  in system_opcode_insn()
419 			ct = &vcpu->arch.guest_context;  in kvm_riscv_vcpu_virtual_insn()
461 	struct kvm_cpu_context *ct = &vcpu->arch.guest_context;  in kvm_riscv_vcpu_mmio_load()
536 	vcpu->arch.mmio_decode.insn = insn;  in kvm_riscv_vcpu_mmio_load()
537 	vcpu->arch.mmio_decode.insn_len = insn_len;  in kvm_riscv_vcpu_mmio_load()
538 	vcpu->arch.mmio_decode.shift = shift;  in kvm_riscv_vcpu_mmio_load()
539 	vcpu->arch.mmio_decode.len = len;  in kvm_riscv_vcpu_mmio_load()
540 	vcpu->arch.mmio_decode.return_handled = 0;  in kvm_riscv_vcpu_mmio_load()
587 	struct kvm_cpu_context *ct = &vcpu->arch.guest_context;  in kvm_riscv_vcpu_mmio_store()
613 	data = GET_RS2(insn, &vcpu->arch.guest_context);  in kvm_riscv_vcpu_mmio_store()
629 		data64 = GET_RS2S(insn, &vcpu->arch.guest_context);  in kvm_riscv_vcpu_mmio_store()
633 		data64 = GET_RS2C(insn, &vcpu->arch.guest_context);  in kvm_riscv_vcpu_mmio_store()
637 		data32 = GET_RS2S(insn, &vcpu->arch.guest_context);  in kvm_riscv_vcpu_mmio_store()
641 		data32 = GET_RS2C(insn, &vcpu->arch.guest_context);  in kvm_riscv_vcpu_mmio_store()
651 	vcpu->arch.mmio_decode.insn = insn;  in kvm_riscv_vcpu_mmio_store()
652 	vcpu->arch.mmio_decode.insn_len = insn_len;  in kvm_riscv_vcpu_mmio_store()
653 	vcpu->arch.mmio_decode.shift = 0;  in kvm_riscv_vcpu_mmio_store()
654 	vcpu->arch.mmio_decode.len = len;  in kvm_riscv_vcpu_mmio_store()
655 	vcpu->arch.mmio_decode.return_handled = 0;  in kvm_riscv_vcpu_mmio_store()
712 	if (vcpu->arch.mmio_decode.return_handled)  in kvm_riscv_vcpu_mmio_return()
715 	vcpu->arch.mmio_decode.return_handled = 1;  in kvm_riscv_vcpu_mmio_return()
716 	insn = vcpu->arch.mmio_decode.insn;  in kvm_riscv_vcpu_mmio_return()
721 	len = vcpu->arch.mmio_decode.len;  in kvm_riscv_vcpu_mmio_return()
722 	shift = vcpu->arch.mmio_decode.shift;  in kvm_riscv_vcpu_mmio_return()
727 		SET_RD(insn, &vcpu->arch.guest_context,  in kvm_riscv_vcpu_mmio_return()
732 		SET_RD(insn, &vcpu->arch.guest_context,  in kvm_riscv_vcpu_mmio_return()
737 		SET_RD(insn, &vcpu->arch.guest_context,  in kvm_riscv_vcpu_mmio_return()
742 		SET_RD(insn, &vcpu->arch.guest_context,  in kvm_riscv_vcpu_mmio_return()
751 	vcpu->arch.guest_context.sepc += vcpu->arch.mmio_decode.insn_len;  in kvm_riscv_vcpu_mmio_return()