69 #define imsic_read_switchcase(__ireg)			\  argument
70 	case __ireg:					\
71 		return imsic_vs_csr_read(__ireg);
72 #define imsic_read_switchcase_2(__ireg)			\  argument
73 	imsic_read_switchcase(__ireg + 0)		\
74 	imsic_read_switchcase(__ireg + 1)
75 #define imsic_read_switchcase_4(__ireg)			\  argument
76 	imsic_read_switchcase_2(__ireg + 0)		\
77 	imsic_read_switchcase_2(__ireg + 2)
78 #define imsic_read_switchcase_8(__ireg)			\  argument
79 	imsic_read_switchcase_4(__ireg + 0)		\
80 	imsic_read_switchcase_4(__ireg + 4)
81 #define imsic_read_switchcase_16(__ireg)		\  argument
82 	imsic_read_switchcase_8(__ireg + 0)		\
83 	imsic_read_switchcase_8(__ireg + 8)
84 #define imsic_read_switchcase_32(__ireg)		\  argument
85 	imsic_read_switchcase_16(__ireg + 0)		\
86 	imsic_read_switchcase_16(__ireg + 16)
87 #define imsic_read_switchcase_64(__ireg)		\  argument
88 	imsic_read_switchcase_32(__ireg + 0)		\
89 	imsic_read_switchcase_32(__ireg + 32)
109 #define imsic_swap_switchcase(__ireg, __v)		\  argument
110 	case __ireg:					\
111 		return imsic_vs_csr_swap(__ireg, __v);
112 #define imsic_swap_switchcase_2(__ireg, __v)		\  argument
113 	imsic_swap_switchcase(__ireg + 0, __v)		\
114 	imsic_swap_switchcase(__ireg + 1, __v)
115 #define imsic_swap_switchcase_4(__ireg, __v)		\  argument
116 	imsic_swap_switchcase_2(__ireg + 0, __v)	\
117 	imsic_swap_switchcase_2(__ireg + 2, __v)
118 #define imsic_swap_switchcase_8(__ireg, __v)		\  argument
119 	imsic_swap_switchcase_4(__ireg + 0, __v)	\
120 	imsic_swap_switchcase_4(__ireg + 4, __v)
121 #define imsic_swap_switchcase_16(__ireg, __v)		\  argument
122 	imsic_swap_switchcase_8(__ireg + 0, __v)	\
123 	imsic_swap_switchcase_8(__ireg + 8, __v)
124 #define imsic_swap_switchcase_32(__ireg, __v)		\  argument
125 	imsic_swap_switchcase_16(__ireg + 0, __v)	\
126 	imsic_swap_switchcase_16(__ireg + 16, __v)
127 #define imsic_swap_switchcase_64(__ireg, __v)		\  argument
128 	imsic_swap_switchcase_32(__ireg + 0, __v)	\
129 	imsic_swap_switchcase_32(__ireg + 32, __v)
147 #define imsic_write_switchcase(__ireg, __v)		\  argument
148 	case __ireg:					\
149 		imsic_vs_csr_write(__ireg, __v);	\
151 #define imsic_write_switchcase_2(__ireg, __v)		\  argument
152 	imsic_write_switchcase(__ireg + 0, __v)		\
153 	imsic_write_switchcase(__ireg + 1, __v)
154 #define imsic_write_switchcase_4(__ireg, __v)		\  argument
155 	imsic_write_switchcase_2(__ireg + 0, __v)	\
156 	imsic_write_switchcase_2(__ireg + 2, __v)
157 #define imsic_write_switchcase_8(__ireg, __v)		\  argument
158 	imsic_write_switchcase_4(__ireg + 0, __v)	\
159 	imsic_write_switchcase_4(__ireg + 4, __v)
160 #define imsic_write_switchcase_16(__ireg, __v)		\  argument
161 	imsic_write_switchcase_8(__ireg + 0, __v)	\
162 	imsic_write_switchcase_8(__ireg + 8, __v)
163 #define imsic_write_switchcase_32(__ireg, __v)		\  argument
164 	imsic_write_switchcase_16(__ireg + 0, __v)	\
165 	imsic_write_switchcase_16(__ireg + 16, __v)
166 #define imsic_write_switchcase_64(__ireg, __v)		\  argument
167 	imsic_write_switchcase_32(__ireg + 0, __v)	\
168 	imsic_write_switchcase_32(__ireg + 32, __v)
184 #define imsic_set_switchcase(__ireg, __v)		\  argument
185 	case __ireg:					\
186 		imsic_vs_csr_set(__ireg, __v);		\
188 #define imsic_set_switchcase_2(__ireg, __v)		\  argument
189 	imsic_set_switchcase(__ireg + 0, __v)		\
190 	imsic_set_switchcase(__ireg + 1, __v)
191 #define imsic_set_switchcase_4(__ireg, __v)		\  argument
192 	imsic_set_switchcase_2(__ireg + 0, __v)		\
193 	imsic_set_switchcase_2(__ireg + 2, __v)
194 #define imsic_set_switchcase_8(__ireg, __v)		\  argument
195 	imsic_set_switchcase_4(__ireg + 0, __v)		\
196 	imsic_set_switchcase_4(__ireg + 4, __v)
197 #define imsic_set_switchcase_16(__ireg, __v)		\  argument
198 	imsic_set_switchcase_8(__ireg + 0, __v)		\
199 	imsic_set_switchcase_8(__ireg + 8, __v)
200 #define imsic_set_switchcase_32(__ireg, __v)		\  argument
201 	imsic_set_switchcase_16(__ireg + 0, __v)	\
202 	imsic_set_switchcase_16(__ireg + 16, __v)
203 #define imsic_set_switchcase_64(__ireg, __v)		\  argument
204 	imsic_set_switchcase_32(__ireg + 0, __v)	\
205 	imsic_set_switchcase_32(__ireg + 32, __v)