Lines Matching +full:0 +full:x10060000
20 #size-cells = <0>;
22 S7_0: cpu@0 {
24 reg = <0>;
185 cpu_opp: opp-table-0 {
245 #clock-cells = <0>;
250 #clock-cells = <0>;
256 #clock-cells = <0>;
262 #clock-cells = <0>;
268 #clock-cells = <0>;
274 #clock-cells = <0>;
280 #clock-cells = <0>;
286 #clock-cells = <0>;
292 #clock-cells = <0>;
298 #clock-cells = <0>;
304 #clock-cells = <0>;
310 #clock-cells = <0>;
316 #clock-cells = <0>;
323 snps,blen = <256 128 64 32 0 0 0>;
329 #clock-cells = <0>;
341 reg = <0x0 0x2000000 0x0 0x10000>;
351 reg = <0x0 0x2010000 0x0 0x4000>;
361 compatible = "starfive,jh7110-plic", "sifive,plic-1.0.0";
362 reg = <0x0 0xc000000 0x0 0x4000000>;
370 #address-cells = <0>;
376 reg = <0x0 0x10000000 0x0 0x10000>;
389 reg = <0x0 0x10010000 0x0 0x10000>;
402 reg = <0x0 0x10020000 0x0 0x10000>;
415 reg = <0x0 0x10030000 0x0 0x10000>;
421 #size-cells = <0>;
427 reg = <0x0 0x10040000 0x0 0x10000>;
433 #size-cells = <0>;
439 reg = <0x0 0x10050000 0x0 0x10000>;
445 #size-cells = <0>;
451 reg = <0x0 0x10060000 0x0 0x10000>;
457 arm,primecell-periphid = <0x00041022>;
460 #size-cells = <0>;
466 reg = <0x0 0x10070000 0x0 0x10000>;
472 arm,primecell-periphid = <0x00041022>;
475 #size-cells = <0>;
481 reg = <0x0 0x10080000 0x0 0x10000>;
487 arm,primecell-periphid = <0x00041022>;
490 #size-cells = <0>;
496 reg = <0x0 0x10090000 0x0 0x1000>;
511 #sound-dai-cells = <0>;
517 ranges = <0x0 0x0 0x10100000 0x100000>;
520 starfive,stg-syscon = <&stg_syscon 0x4>;
534 usb_cdns3: usb@0 {
536 reg = <0x0 0x10000>,
537 <0x10000 0x10000>,
538 <0x20000 0x10000>;
549 reg = <0x0 0x10200000 0x0 0x10000>;
553 #phy-cells = <0>;
558 reg = <0x0 0x10210000 0x0 0x10000>;
559 #phy-cells = <0>;
564 reg = <0x0 0x10220000 0x0 0x10000>;
565 #phy-cells = <0>;
570 reg = <0x0 0x10230000 0x0 0x10000>;
589 reg = <0x0 0x10240000 0x0 0x1000>;
594 reg = <0x0 0x12000000 0x0 0x10000>;
607 reg = <0x0 0x12010000 0x0 0x10000>;
620 reg = <0x0 0x12020000 0x0 0x10000>;
633 reg = <0x0 0x12030000 0x0 0x10000>;
639 #size-cells = <0>;
645 reg = <0x0 0x12040000 0x0 0x10000>;
651 #size-cells = <0>;
657 reg = <0x0 0x12050000 0x0 0x10000>;
663 #size-cells = <0>;
669 reg = <0x0 0x12060000 0x0 0x10000>;
675 #size-cells = <0>;
681 reg = <0x0 0x12070000 0x0 0x10000>;
687 arm,primecell-periphid = <0x00041022>;
690 #size-cells = <0>;
696 reg = <0x0 0x12080000 0x0 0x10000>;
702 arm,primecell-periphid = <0x00041022>;
705 #size-cells = <0>;
711 reg = <0x0 0x12090000 0x0 0x10000>;
717 arm,primecell-periphid = <0x00041022>;
720 #size-cells = <0>;
726 reg = <0x0 0x120A0000 0x0 0x10000>;
732 arm,primecell-periphid = <0x00041022>;
735 #size-cells = <0>;
741 reg = <0x0 0x120e0000 0x0 0x10000>;
748 #thermal-sensor-cells = <0>;
753 reg = <0x0 0x13010000 0x0 0x10000>,
754 <0x0 0x21000000 0x0 0x400000>;
766 cdns,trigger-address = <0x0>;
772 reg = <0x0 0x13020000 0x0 0x10000>;
793 reg = <0x0 0x13030000 0x0 0x1000>;
804 reg = <0x0 0x13040000 0x0 0x10000>;
816 reg = <0x0 0x13070000 0x0 0x10000>;
826 reg = <0x0 0x16000000 0x0 0x4000>;
832 dmas = <&sdma 1 2>, <&sdma 0 2>;
838 arm,primecell-periphid = <0x00041080>;
839 reg = <0x0 0x16008000 0x0 0x4000>;
853 reg = <0x0 0x1600C000 0x0 0x4000>;
863 reg = <0x0 0x16010000 0x0 0x10000>;
872 data-addr = <0>;
873 starfive,sysreg = <&sys_syscon 0x14 0x1a 0x7c000000>;
879 reg = <0x0 0x16020000 0x0 0x10000>;
888 data-addr = <0>;
889 starfive,sysreg = <&sys_syscon 0x9c 0x1 0x3e>;
895 reg = <0x0 0x16030000 0x0 0x10000>;
920 starfive,syscon = <&aon_syscon 0xc 0x12>;
926 reg = <0x0 0x16040000 0x0 0x10000>;
951 starfive,syscon = <&sys_syscon 0x90 0x2>;
957 reg = <0x0 0x16050000 0x0 0x10000>;
969 snps,priority = <0 1 2 3>;
975 reg = <0x0 0x17000000 0x0 0x10000>;
992 reg = <0x0 0x17010000 0x0 0x1000>;
998 reg = <0x0 0x17020000 0x0 0x10000>;
1009 reg = <0x0 0x17030000 0x0 0x10000>;
1016 reg = <0x0 0x19810000 0x0 0x10000>;
1033 reg = <0x0 0x295c0000 0x0 0x10000>;