Lines Matching +full:0 +full:x38200000
15 #size-cells = <0>;
17 cpu0: cpu@0 {
23 reg = <0>;
173 #clock-cells = <0>;
178 mboxes = <&mbox 0>;
189 reg = <0x0 0x2010000 0x0 0x1000>;
201 reg = <0x0 0x2000000 0x0 0xC000>;
210 compatible = "sifive,fu540-c000-plic", "sifive,plic-1.0.0";
211 reg = <0x0 0xc000000 0x0 0x4000000>;
212 #address-cells = <0>;
225 reg = <0x0 0x3000000 0x0 0x8000>;
234 reg = <0x0 0x20002000 0x0 0x1000>, <0x0 0x3E001000 0x0 0x1000>;
242 reg = <0x0 0x38010000 0x0 0x1000>, <0x0 0x38020000 0x0 0x1000>,
243 <0x0 0x39010000 0x0 0x1000>, <0x0 0x39020000 0x0 0x1000>;
250 reg = <0x0 0x38040000 0x0 0x1000>, <0x0 0x38080000 0x0 0x1000>,
251 <0x0 0x39040000 0x0 0x1000>, <0x0 0x39080000 0x0 0x1000>;
258 reg = <0x0 0x38100000 0x0 0x1000>, <0x0 0x38200000 0x0 0x1000>,
259 <0x0 0x39100000 0x0 0x1000>, <0x0 0x39200000 0x0 0x1000>;
266 reg = <0x0 0x38400000 0x0 0x1000>, <0x0 0x38800000 0x0 0x1000>,
267 <0x0 0x39400000 0x0 0x1000>, <0x0 0x39800000 0x0 0x1000>;
274 reg = <0x0 0x20000000 0x0 0x400>;
286 reg = <0x0 0x20100000 0x0 0x400>;
298 reg = <0x0 0x20102000 0x0 0x400>;
310 reg = <0x0 0x20104000 0x0 0x400>;
322 reg = <0x0 0x20106000 0x0 0x400>;
335 reg = <0x0 0x20008000 0x0 0x1000>;
346 #size-cells = <0>;
347 reg = <0x0 0x20108000 0x0 0x1000>;
357 #size-cells = <0>;
358 reg = <0x0 0x20109000 0x0 0x1000>;
368 #size-cells = <0>;
369 reg = <0x0 0x21000000 0x0 0x1000>;
378 reg = <0x0 0x2010a000 0x0 0x1000>;
380 #size-cells = <0>;
390 reg = <0x0 0x2010b000 0x0 0x1000>;
392 #size-cells = <0>;
402 reg = <0x0 0x2010c000 0x0 0x1000>;
411 reg = <0x0 0x2010d000 0x0 0x1000>;
420 reg = <0x0 0x20110000 0x0 0x2000>;
422 #size-cells = <0>;
434 reg = <0x0 0x20112000 0x0 0x2000>;
436 #size-cells = <0>;
448 reg = <0x0 0x20120000 0x0 0x1000>;
460 reg = <0x0 0x20121000 0x0 0x1000>;
472 reg = <0x0 0x20122000 0x0 0x1000>;
484 reg = <0x0 0x20124000 0x0 0x1000>;
494 reg = <0x0 0x20201000 0x0 0x1000>;
504 reg = <0x0 0x37020000 0x0 0x58>, <0x0 0x2000318C 0x0 0x40>,
505 <0x0 0x37020800 0x0 0x100>;