Lines Matching +full:c900 +full:- +full:plic
1 // SPDX-License-Identifier: (GPL-2.0+ or MIT)
2 // Copyright (C) 2021-2022 Samuel Holland <samuel@sholland.org>
6 #include "sunxi-d1s-t113.dtsi"
10 timebase-frequency = <24000000>;
11 #address-cells = <1>;
12 #size-cells = <0>;
19 d-cache-block-size = <64>;
20 d-cache-sets = <256>;
21 d-cache-size = <32768>;
22 i-cache-block-size = <64>;
23 i-cache-sets = <128>;
24 i-cache-size = <32768>;
25 mmu-type = "riscv,sv39";
26 operating-points-v2 = <&opp_table_cpu>;
28 #cooling-cells = <2>;
30 cpu0_intc: interrupt-controller {
31 compatible = "riscv,cpu-intc";
32 interrupt-controller;
33 #interrupt-cells = <1>;
38 opp_table_cpu: opp-table-cpu {
39 compatible = "operating-points-v2";
41 opp-408000000 {
42 opp-hz = /bits/ 64 <408000000>;
43 opp-microvolt = <900000 900000 1100000>;
46 opp-1080000000 {
47 opp-hz = /bits/ 64 <1008000000>;
48 opp-microvolt = <900000 900000 1100000>;
53 interrupt-parent = <&plic>;
56 compatible = "allwinner,sun20i-d1-wdt";
60 clock-names = "hosc", "losc";
63 plic: interrupt-controller@10000000 { label
64 compatible = "allwinner,sun20i-d1-plic",
65 "thead,c900-plic";
67 interrupts-extended = <&cpu0_intc 11>,
69 interrupt-controller;
71 #address-cells = <0>;
72 #interrupt-cells = <2>;