powerpc/xmon/ppc-opc.c

2963 #define PPC403	PPC_OPCODE_403  macro
4384 {"rfci",	XL(19,51), 0xffffffff, PPC403|BOOKE|PPCE300|PPCA2|PPC476, PPCVLE, {0}},
4842 {"dlmzb",	XRC(31,78,0), X_MASK, PPC403|PPC440|TITAN, 0,		{RA, RS, RB}},
4843 {"dlmzb.",	XRC(31,78,1), X_MASK, PPC403|PPC440|TITAN, 0,		{RA, RS, RB}},
4894 {"wrtee",	X(31,131), XRARB_MASK, PPC403|BOOKE|PPCA2|PPC476, 0,	{RS}},
4946 {"wrteei",	X(31,163), XE_MASK, PPC403|BOOKE|PPCA2|PPC476, 0,	{E}},
5071 {"icbt",	X(31,262),	XRT_MASK,    PPC403,	0,		{RA, RB}},
5146 {"mfexisr",	XSPR(31,323, 64), XSPR_MASK, PPC403,	0,		{RT}},
5147 {"mfexier",	XSPR(31,323, 66), XSPR_MASK, PPC403,	0,		{RT}},
5148 {"mfbr0",	XSPR(31,323,128), XSPR_MASK, PPC403,	0,		{RT}},
5149 {"mfbr1",	XSPR(31,323,129), XSPR_MASK, PPC403,	0,		{RT}},
5150 {"mfbr2",	XSPR(31,323,130), XSPR_MASK, PPC403,	0,		{RT}},
5151 {"mfbr3",	XSPR(31,323,131), XSPR_MASK, PPC403,	0,		{RT}},
5152 {"mfbr4",	XSPR(31,323,132), XSPR_MASK, PPC403,	0,		{RT}},
5153 {"mfbr5",	XSPR(31,323,133), XSPR_MASK, PPC403,	0,		{RT}},
5154 {"mfbr6",	XSPR(31,323,134), XSPR_MASK, PPC403,	0,		{RT}},
5155 {"mfbr7",	XSPR(31,323,135), XSPR_MASK, PPC403,	0,		{RT}},
5156 {"mfbear",	XSPR(31,323,144), XSPR_MASK, PPC403,	0,		{RT}},
5157 {"mfbesr",	XSPR(31,323,145), XSPR_MASK, PPC403,	0,		{RT}},
5158 {"mfiocr",	XSPR(31,323,160), XSPR_MASK, PPC403,	0,		{RT}},
5159 {"mfdmacr0",	XSPR(31,323,192), XSPR_MASK, PPC403,	0,		{RT}},
5160 {"mfdmact0",	XSPR(31,323,193), XSPR_MASK, PPC403,	0,		{RT}},
5161 {"mfdmada0",	XSPR(31,323,194), XSPR_MASK, PPC403,	0,		{RT}},
5162 {"mfdmasa0",	XSPR(31,323,195), XSPR_MASK, PPC403,	0,		{RT}},
5163 {"mfdmacc0",	XSPR(31,323,196), XSPR_MASK, PPC403,	0,		{RT}},
5164 {"mfdmacr1",	XSPR(31,323,200), XSPR_MASK, PPC403,	0,		{RT}},
5165 {"mfdmact1",	XSPR(31,323,201), XSPR_MASK, PPC403,	0,		{RT}},
5166 {"mfdmada1",	XSPR(31,323,202), XSPR_MASK, PPC403,	0,		{RT}},
5167 {"mfdmasa1",	XSPR(31,323,203), XSPR_MASK, PPC403,	0,		{RT}},
5168 {"mfdmacc1",	XSPR(31,323,204), XSPR_MASK, PPC403,	0,		{RT}},
5169 {"mfdmacr2",	XSPR(31,323,208), XSPR_MASK, PPC403,	0,		{RT}},
5170 {"mfdmact2",	XSPR(31,323,209), XSPR_MASK, PPC403,	0,		{RT}},
5171 {"mfdmada2",	XSPR(31,323,210), XSPR_MASK, PPC403,	0,		{RT}},
5172 {"mfdmasa2",	XSPR(31,323,211), XSPR_MASK, PPC403,	0,		{RT}},
5173 {"mfdmacc2",	XSPR(31,323,212), XSPR_MASK, PPC403,	0,		{RT}},
5174 {"mfdmacr3",	XSPR(31,323,216), XSPR_MASK, PPC403,	0,		{RT}},
5175 {"mfdmact3",	XSPR(31,323,217), XSPR_MASK, PPC403,	0,		{RT}},
5176 {"mfdmada3",	XSPR(31,323,218), XSPR_MASK, PPC403,	0,		{RT}},
5177 {"mfdmasa3",	XSPR(31,323,219), XSPR_MASK, PPC403,	0,		{RT}},
5178 {"mfdmacc3",	XSPR(31,323,220), XSPR_MASK, PPC403,	0,		{RT}},
5179 {"mfdmasr",	XSPR(31,323,224), XSPR_MASK, PPC403,	0,		{RT}},
5180 {"mfdcr",	X(31,323), X_MASK, PPC403|BOOKE|PPCA2|PPC476, E500|TITAN, {RT, SPR}},
5347 {"mfzpr",	XSPR(31,339,944), XSPR_MASK, PPC403,	0,		{RT}},
5348 {"mfpid",	XSPR(31,339,945), XSPR_MASK, PPC403,	0,		{RT}},
5357 {"mfsgr",	XSPR(31,339,953), XSPR_MASK, PPC403,	0,		{RT}},
5358 {"mfdcwr",	XSPR(31,339,954), XSPR_MASK, PPC403,	0,		{RT}},
5367 {"mficdbdr",	XSPR(31,339,979), XSPR_MASK, PPC403|TITAN, 0,		{RT}},
5368 {"mfesr",	XSPR(31,339,980), XSPR_MASK, PPC403,	0,		{RT}},
5369 {"mfdear",	XSPR(31,339,981), XSPR_MASK, PPC403,	0,		{RT}},
5370 {"mfevpr",	XSPR(31,339,982), XSPR_MASK, PPC403,	0,		{RT}},
5371 {"mfcdbcr",	XSPR(31,339,983), XSPR_MASK, PPC403,	0,		{RT}},
5372 {"mftsr",	XSPR(31,339,984), XSPR_MASK, PPC403,	0,		{RT}},
5373 {"mftcr",	XSPR(31,339,986), XSPR_MASK, PPC403,	0,		{RT}},
5374 {"mfpit",	XSPR(31,339,987), XSPR_MASK, PPC403,	0,		{RT}},
5375 {"mftbhi",	XSPR(31,339,988), XSPR_MASK, PPC403,	0,		{RT}},
5376 {"mftblo",	XSPR(31,339,989), XSPR_MASK, PPC403,	0,		{RT}},
5377 {"mfsrr2",	XSPR(31,339,990), XSPR_MASK, PPC403,	0,		{RT}},
5378 {"mfsrr3",	XSPR(31,339,991), XSPR_MASK, PPC403,	0,		{RT}},
5379 {"mfdbsr",	XSPR(31,339,1008), XSPR_MASK, PPC403,	0,		{RT}},
5382 {"mfiac1",	XSPR(31,339,1012), XSPR_MASK, PPC403,	0,		{RT}},
5383 {"mfiac2",	XSPR(31,339,1013), XSPR_MASK, PPC403,	0,		{RT}},
5384 {"mfdac1",	XSPR(31,339,1014), XSPR_MASK, PPC403,	0,		{RT}},
5385 {"mfdac2",	XSPR(31,339,1015), XSPR_MASK, PPC403,	0,		{RT}},
5387 {"mfdccr",	XSPR(31,339,1018), XSPR_MASK, PPC403,	0,		{RT}},
5388 {"mficcr",	XSPR(31,339,1019), XSPR_MASK, PPC403,	0,		{RT}},
5390 {"mfpbl1",	XSPR(31,339,1020), XSPR_MASK, PPC403,	0,		{RT}},
5392 {"mfpbu1",	XSPR(31,339,1021), XSPR_MASK, PPC403,	0,		{RT}},
5394 {"mfpbl2",	XSPR(31,339,1022), XSPR_MASK, PPC403,	0,		{RT}},
5396 {"mfpbu2",	XSPR(31,339,1023), XSPR_MASK, PPC403,	0,		{RT}},
5500 {"mtexisr",	XSPR(31,451, 64), XSPR_MASK, PPC403,	0,		{RS}},
5501 {"mtexier",	XSPR(31,451, 66), XSPR_MASK, PPC403,	0,		{RS}},
5502 {"mtbr0",	XSPR(31,451,128), XSPR_MASK, PPC403,	0,		{RS}},
5503 {"mtbr1",	XSPR(31,451,129), XSPR_MASK, PPC403,	0,		{RS}},
5504 {"mtbr2",	XSPR(31,451,130), XSPR_MASK, PPC403,	0,		{RS}},
5505 {"mtbr3",	XSPR(31,451,131), XSPR_MASK, PPC403,	0,		{RS}},
5506 {"mtbr4",	XSPR(31,451,132), XSPR_MASK, PPC403,	0,		{RS}},
5507 {"mtbr5",	XSPR(31,451,133), XSPR_MASK, PPC403,	0,		{RS}},
5508 {"mtbr6",	XSPR(31,451,134), XSPR_MASK, PPC403,	0,		{RS}},
5509 {"mtbr7",	XSPR(31,451,135), XSPR_MASK, PPC403,	0,		{RS}},
5510 {"mtbear",	XSPR(31,451,144), XSPR_MASK, PPC403,	0,		{RS}},
5511 {"mtbesr",	XSPR(31,451,145), XSPR_MASK, PPC403,	0,		{RS}},
5512 {"mtiocr",	XSPR(31,451,160), XSPR_MASK, PPC403,	0,		{RS}},
5513 {"mtdmacr0",	XSPR(31,451,192), XSPR_MASK, PPC403,	0,		{RS}},
5514 {"mtdmact0",	XSPR(31,451,193), XSPR_MASK, PPC403,	0,		{RS}},
5515 {"mtdmada0",	XSPR(31,451,194), XSPR_MASK, PPC403,	0,		{RS}},
5516 {"mtdmasa0",	XSPR(31,451,195), XSPR_MASK, PPC403,	0,		{RS}},
5517 {"mtdmacc0",	XSPR(31,451,196), XSPR_MASK, PPC403,	0,		{RS}},
5518 {"mtdmacr1",	XSPR(31,451,200), XSPR_MASK, PPC403,	0,		{RS}},
5519 {"mtdmact1",	XSPR(31,451,201), XSPR_MASK, PPC403,	0,		{RS}},
5520 {"mtdmada1",	XSPR(31,451,202), XSPR_MASK, PPC403,	0,		{RS}},
5521 {"mtdmasa1",	XSPR(31,451,203), XSPR_MASK, PPC403,	0,		{RS}},
5522 {"mtdmacc1",	XSPR(31,451,204), XSPR_MASK, PPC403,	0,		{RS}},
5523 {"mtdmacr2",	XSPR(31,451,208), XSPR_MASK, PPC403,	0,		{RS}},
5524 {"mtdmact2",	XSPR(31,451,209), XSPR_MASK, PPC403,	0,		{RS}},
5525 {"mtdmada2",	XSPR(31,451,210), XSPR_MASK, PPC403,	0,		{RS}},
5526 {"mtdmasa2",	XSPR(31,451,211), XSPR_MASK, PPC403,	0,		{RS}},
5527 {"mtdmacc2",	XSPR(31,451,212), XSPR_MASK, PPC403,	0,		{RS}},
5528 {"mtdmacr3",	XSPR(31,451,216), XSPR_MASK, PPC403,	0,		{RS}},
5529 {"mtdmact3",	XSPR(31,451,217), XSPR_MASK, PPC403,	0,		{RS}},
5530 {"mtdmada3",	XSPR(31,451,218), XSPR_MASK, PPC403,	0,		{RS}},
5531 {"mtdmasa3",	XSPR(31,451,219), XSPR_MASK, PPC403,	0,		{RS}},
5532 {"mtdmacc3",	XSPR(31,451,220), XSPR_MASK, PPC403,	0,		{RS}},
5533 {"mtdmasr",	XSPR(31,451,224), XSPR_MASK, PPC403,	0,		{RS}},
5534 {"mtdcr",	X(31,451), X_MASK, PPC403|BOOKE|PPCA2|PPC476, E500|TITAN, {SPR, RS}},
5539 {"dccci",	X(31,454), XRT_MASK, PPC403|PPC440|TITAN|PPCA2, 0,	{RAOPT, RBOPT}},
5667 {"mtzpr",	XSPR(31,467,944), XSPR_MASK, PPC403,	0,		{RS}},
5668 {"mtpid",	XSPR(31,467,945), XSPR_MASK, PPC403,	0,		{RS}},
5677 {"mtsgr",	XSPR(31,467,953), XSPR_MASK, PPC403,	0,		{RS}},
5678 {"mtdcwr",	XSPR(31,467,954), XSPR_MASK, PPC403,	0,		{RS}},
5687 {"mticdbdr",	XSPR(31,467,979), XSPR_MASK, PPC403,	0,		{RS}},
5688 {"mtesr",	XSPR(31,467,980), XSPR_MASK, PPC403,	0,		{RS}},
5689 {"mtdear",	XSPR(31,467,981), XSPR_MASK, PPC403,	0,		{RS}},
5690 {"mtevpr",	XSPR(31,467,982), XSPR_MASK, PPC403,	0,		{RS}},
5691 {"mtcdbcr",	XSPR(31,467,983), XSPR_MASK, PPC403,	0,		{RS}},
5692 {"mttsr",	XSPR(31,467,984), XSPR_MASK, PPC403,	0,		{RS}},
5693 {"mttcr",	XSPR(31,467,986), XSPR_MASK, PPC403,	0,		{RS}},
5694 {"mtpit",	XSPR(31,467,987), XSPR_MASK, PPC403,	0,		{RS}},
5695 {"mttbhi",	XSPR(31,467,988), XSPR_MASK, PPC403,	0,		{RS}},
5696 {"mttblo",	XSPR(31,467,989), XSPR_MASK, PPC403,	0,		{RS}},
5697 {"mtsrr2",	XSPR(31,467,990), XSPR_MASK, PPC403,	0,		{RS}},
5698 {"mtsrr3",	XSPR(31,467,991), XSPR_MASK, PPC403,	0,		{RS}},
5699 {"mtdbsr",	XSPR(31,467,1008), XSPR_MASK, PPC403,	0,		{RS}},
5702 {"mtiac1",	XSPR(31,467,1012), XSPR_MASK, PPC403,	0,		{RS}},
5703 {"mtiac2",	XSPR(31,467,1013), XSPR_MASK, PPC403,	0,		{RS}},
5704 {"mtdac1",	XSPR(31,467,1014), XSPR_MASK, PPC403,	0,		{RS}},
5705 {"mtdac2",	XSPR(31,467,1015), XSPR_MASK, PPC403,	0,		{RS}},
5707 {"mtdccr",	XSPR(31,467,1018), XSPR_MASK, PPC403,	0,		{RS}},
5708 {"mticcr",	XSPR(31,467,1019), XSPR_MASK, PPC403,	0,		{RS}},
5710 {"mtpbl1",	XSPR(31,467,1020), XSPR_MASK, PPC403,	0,		{RS}},
5712 {"mtpbu1",	XSPR(31,467,1021), XSPR_MASK, PPC403,	0,		{RS}},
5714 {"mtpbl2",	XSPR(31,467,1022), XSPR_MASK, PPC403,	0,		{RS}},
5716 {"mtpbu2",	XSPR(31,467,1023), XSPR_MASK, PPC403,	0,		{RS}},
5726 {"dcread",	X(31,486),	X_MASK,	 PPC403|PPC440, PPCA2|PPC476,	{RT, RA0, RB}},
6150 {"tlbsx",	XRC(31,914,0),	X_MASK, PPC403|BOOKE|PPCA2|PPC476, 0,	{RTO, RA0, RB}},
6151 {"tlbsx.",	XRC(31,914,1),	X_MASK, PPC403|BOOKE|PPCA2|PPC476, 0,	{RTO, RA0, RB}},
6194 {"tlbrehi",	XTLB(31,946,0),	XTLB_MASK,   PPC403,	PPCA2,		{RT, RA}},
6195 {"tlbrelo",	XTLB(31,946,1),	XTLB_MASK,   PPC403,	PPCA2,		{RT, RA}},
6196 {"tlbre",	X(31,946),  X_MASK, PPC403|BOOKE|PPCA2|PPC476, 0,	{RSO, RAOPT, SHO}},
6213 {"iccci",	X(31,966), XRT_MASK, PPC403|PPC440|TITAN|PPCA2, 0,	 {RAOPT, RBOPT}},
6225 {"tlbld",	X(31,978),	XRTRA_MASK,  PPC, PPC403|BOOKE|PPCA2|PPC476, {RB}},
6226 {"tlbwehi",	XTLB(31,978,0),	XTLB_MASK,   PPC403,	0,		{RT, RA}},
6227 {"tlbwelo",	XTLB(31,978,1),	XTLB_MASK,   PPC403,	0,		{RT, RA}},
6228 {"tlbwe",	X(31,978),  X_MASK, PPC403|BOOKE|PPCA2|PPC476, 0,	{RSO, RAOPT, SHO}},
6245 {"icread",	X(31,998),     XRT_MASK, PPC403|PPC440|PPC476|TITAN, 0,	{RA0, RB}},