powerpc/xmon/ppc-opc.c

2987 #define BOOKE	PPC_OPCODE_BOOKE  macro
4384 {"rfci",	XL(19,51), 0xffffffff, PPC403|BOOKE|PPCE300|PPCA2|PPC476, PPCVLE, {0}},
4733 {"icbt",	X(31,22),  X_MASK, BOOKE|PPCE300|PPCA2|PPC476, 0,	{CT, RA0, RB}},
4894 {"wrtee",	X(31,131), XRARB_MASK, PPC403|BOOKE|PPCA2|PPC476, 0,	{RS}},
4946 {"wrteei",	X(31,163), XE_MASK, PPC403|BOOKE|PPCA2|PPC476, 0,	{E}},
5066 {"mfdcrx",	X(31,259),	X_MASK, BOOKE|PPCA2|PPC476, TITAN,	{RS, RA}},
5096 {"mfapidi",	X(31,275),	X_MASK,	     BOOKE,	E500|TITAN,	{RT, RA}},
5180 {"mfdcr",	X(31,323), X_MASK, PPC403|BOOKE|PPCA2|PPC476, E500|TITAN, {RT, SPR}},
5214 {"mfpid",	XSPR(31,339, 48), XSPR_MASK, BOOKE,	0,		{RT}},
5215 {"mfcsrr0",	XSPR(31,339, 58), XSPR_MASK, BOOKE,	0,		{RT}},
5216 {"mfcsrr1",	XSPR(31,339, 59), XSPR_MASK, BOOKE,	0,		{RT}},
5217 {"mfdear",	XSPR(31,339, 61), XSPR_MASK, BOOKE,	0,		{RT}},
5218 {"mfesr",	XSPR(31,339, 62), XSPR_MASK, BOOKE,	0,		{RT}},
5219 {"mfivpr",	XSPR(31,339, 63), XSPR_MASK, BOOKE,	0,		{RT}},
5238 {"mfusprg0",	XSPR(31,339,256), XSPR_MASK, BOOKE,	0,		{RT}},
5240 {"mfsprg4",	XSPR(31,339,260), XSPR_MASK, PPC405|BOOKE, 0,		{RT}},
5241 {"mfsprg5",	XSPR(31,339,261), XSPR_MASK, PPC405|BOOKE, 0,		{RT}},
5242 {"mfsprg6",	XSPR(31,339,262), XSPR_MASK, PPC405|BOOKE, 0,		{RT}},
5243 {"mfsprg7",	XSPR(31,339,263), XSPR_MASK, PPC405|BOOKE, 0,		{RT}},
5244 {"mftbu",	XSPR(31,339,269), XSPR_MASK, POWER4|BOOKE, 0,		{RT}},
5245 {"mftb",	X(31,339),	  X_MASK,    POWER4|BOOKE, 0,		{RT, TBR}},
5246 {"mftbl",	XSPR(31,339,268), XSPR_MASK, POWER4|BOOKE, 0,		{RT}},
5253 {"mfpir",	XSPR(31,339,286), XSPR_MASK, BOOKE,	0,		{RT}},
5255 {"mfdbsr",	XSPR(31,339,304), XSPR_MASK, BOOKE,	0,		{RT}},
5256 {"mfdbcr0",	XSPR(31,339,308), XSPR_MASK, BOOKE,	0,		{RT}},
5257 {"mfdbcr1",	XSPR(31,339,309), XSPR_MASK, BOOKE,	0,		{RT}},
5258 {"mfdbcr2",	XSPR(31,339,310), XSPR_MASK, BOOKE,	0,		{RT}},
5259 {"mfiac1",	XSPR(31,339,312), XSPR_MASK, BOOKE,	0,		{RT}},
5260 {"mfiac2",	XSPR(31,339,313), XSPR_MASK, BOOKE,	0,		{RT}},
5261 {"mfiac3",	XSPR(31,339,314), XSPR_MASK, BOOKE,	0,		{RT}},
5262 {"mfiac4",	XSPR(31,339,315), XSPR_MASK, BOOKE,	0,		{RT}},
5263 {"mfdac1",	XSPR(31,339,316), XSPR_MASK, BOOKE,	0,		{RT}},
5264 {"mfdac2",	XSPR(31,339,317), XSPR_MASK, BOOKE,	0,		{RT}},
5265 {"mfdvc1",	XSPR(31,339,318), XSPR_MASK, BOOKE,	0,		{RT}},
5266 {"mfdvc2",	XSPR(31,339,319), XSPR_MASK, BOOKE,	0,		{RT}},
5267 {"mftsr",	XSPR(31,339,336), XSPR_MASK, BOOKE,	0,		{RT}},
5268 {"mftcr",	XSPR(31,339,340), XSPR_MASK, BOOKE,	0,		{RT}},
5269 {"mfivor0",	XSPR(31,339,400), XSPR_MASK, BOOKE,	0,		{RT}},
5270 {"mfivor1",	XSPR(31,339,401), XSPR_MASK, BOOKE,	0,		{RT}},
5271 {"mfivor2",	XSPR(31,339,402), XSPR_MASK, BOOKE,	0,		{RT}},
5272 {"mfivor3",	XSPR(31,339,403), XSPR_MASK, BOOKE,	0,		{RT}},
5273 {"mfivor4",	XSPR(31,339,404), XSPR_MASK, BOOKE,	0,		{RT}},
5274 {"mfivor5",	XSPR(31,339,405), XSPR_MASK, BOOKE,	0,		{RT}},
5275 {"mfivor6",	XSPR(31,339,406), XSPR_MASK, BOOKE,	0,		{RT}},
5276 {"mfivor7",	XSPR(31,339,407), XSPR_MASK, BOOKE,	0,		{RT}},
5277 {"mfivor8",	XSPR(31,339,408), XSPR_MASK, BOOKE,	0,		{RT}},
5278 {"mfivor9",	XSPR(31,339,409), XSPR_MASK, BOOKE,	0,		{RT}},
5279 {"mfivor10",	XSPR(31,339,410), XSPR_MASK, BOOKE,	0,		{RT}},
5280 {"mfivor11",	XSPR(31,339,411), XSPR_MASK, BOOKE,	0,		{RT}},
5281 {"mfivor12",	XSPR(31,339,412), XSPR_MASK, BOOKE,	0,		{RT}},
5282 {"mfivor13",	XSPR(31,339,413), XSPR_MASK, BOOKE,	0,		{RT}},
5283 {"mfivor14",	XSPR(31,339,414), XSPR_MASK, BOOKE,	0,		{RT}},
5284 {"mfivor15",	XSPR(31,339,415), XSPR_MASK, BOOKE,	0,		{RT}},
5429 {"mtdcrx",	X(31,387),	X_MASK,	     BOOKE|PPCA2|PPC476, TITAN,	{RA, RS}},
5534 {"mtdcr",	X(31,451), X_MASK, PPC403|BOOKE|PPCA2|PPC476, E500|TITAN, {SPR, RS}},
5569 {"mtpid",	XSPR(31,467, 48), XSPR_MASK, BOOKE,	0,		{RS}},
5570 {"mtdecar",	XSPR(31,467, 54), XSPR_MASK, BOOKE,	0,		{RS}},
5571 {"mtcsrr0",	XSPR(31,467, 58), XSPR_MASK, BOOKE,	0,		{RS}},
5572 {"mtcsrr1",	XSPR(31,467, 59), XSPR_MASK, BOOKE,	0,		{RS}},
5573 {"mtdear",	XSPR(31,467, 61), XSPR_MASK, BOOKE,	0,		{RS}},
5574 {"mtesr",	XSPR(31,467, 62), XSPR_MASK, BOOKE,	0,		{RS}},
5575 {"mtivpr",	XSPR(31,467, 63), XSPR_MASK, BOOKE,	0,		{RS}},
5594 {"mtusprg0",	XSPR(31,467,256), XSPR_MASK, BOOKE,	0,		{RS}},
5600 {"mtsprg4",	XSPR(31,467,276), XSPR_MASK, PPC405|BOOKE, 0,		{RS}},
5601 {"mtsprg5",	XSPR(31,467,277), XSPR_MASK, PPC405|BOOKE, 0,		{RS}},
5602 {"mtsprg6",	XSPR(31,467,278), XSPR_MASK, PPC405|BOOKE, 0,		{RS}},
5603 {"mtsprg7",	XSPR(31,467,279), XSPR_MASK, PPC405|BOOKE, 0,		{RS}},
5608 {"mtdbsr",	XSPR(31,467,304), XSPR_MASK, BOOKE,	0,		{RS}},
5609 {"mtdbcr0",	XSPR(31,467,308), XSPR_MASK, BOOKE,	0,		{RS}},
5610 {"mtdbcr1",	XSPR(31,467,309), XSPR_MASK, BOOKE,	0,		{RS}},
5611 {"mtdbcr2",	XSPR(31,467,310), XSPR_MASK, BOOKE,	0,		{RS}},
5612 {"mtiac1",	XSPR(31,467,312), XSPR_MASK, BOOKE,	0,		{RS}},
5613 {"mtiac2",	XSPR(31,467,313), XSPR_MASK, BOOKE,	0,		{RS}},
5614 {"mtiac3",	XSPR(31,467,314), XSPR_MASK, BOOKE,	0,		{RS}},
5615 {"mtiac4",	XSPR(31,467,315), XSPR_MASK, BOOKE,	0,		{RS}},
5616 {"mtdac1",	XSPR(31,467,316), XSPR_MASK, BOOKE,	0,		{RS}},
5617 {"mtdac2",	XSPR(31,467,317), XSPR_MASK, BOOKE,	0,		{RS}},
5618 {"mtdvc1",	XSPR(31,467,318), XSPR_MASK, BOOKE,	0,		{RS}},
5619 {"mtdvc2",	XSPR(31,467,319), XSPR_MASK, BOOKE,	0,		{RS}},
5620 {"mttsr",	XSPR(31,467,336), XSPR_MASK, BOOKE,	0,		{RS}},
5621 {"mttcr",	XSPR(31,467,340), XSPR_MASK, BOOKE,	0,		{RS}},
5622 {"mtivor0",	XSPR(31,467,400), XSPR_MASK, BOOKE,	0,		{RS}},
5623 {"mtivor1",	XSPR(31,467,401), XSPR_MASK, BOOKE,	0,		{RS}},
5624 {"mtivor2",	XSPR(31,467,402), XSPR_MASK, BOOKE,	0,		{RS}},
5625 {"mtivor3",	XSPR(31,467,403), XSPR_MASK, BOOKE,	0,		{RS}},
5626 {"mtivor4",	XSPR(31,467,404), XSPR_MASK, BOOKE,	0,		{RS}},
5627 {"mtivor5",	XSPR(31,467,405), XSPR_MASK, BOOKE,	0,		{RS}},
5628 {"mtivor6",	XSPR(31,467,406), XSPR_MASK, BOOKE,	0,		{RS}},
5629 {"mtivor7",	XSPR(31,467,407), XSPR_MASK, BOOKE,	0,		{RS}},
5630 {"mtivor8",	XSPR(31,467,408), XSPR_MASK, BOOKE,	0,		{RS}},
5631 {"mtivor9",	XSPR(31,467,409), XSPR_MASK, BOOKE,	0,		{RS}},
5632 {"mtivor10",	XSPR(31,467,410), XSPR_MASK, BOOKE,	0,		{RS}},
5633 {"mtivor11",	XSPR(31,467,411), XSPR_MASK, BOOKE,	0,		{RS}},
5634 {"mtivor12",	XSPR(31,467,412), XSPR_MASK, BOOKE,	0,		{RS}},
5635 {"mtivor13",	XSPR(31,467,413), XSPR_MASK, BOOKE,	0,		{RS}},
5636 {"mtivor14",	XSPR(31,467,414), XSPR_MASK, BOOKE,	0,		{RS}},
5637 {"mtivor15",	XSPR(31,467,415), XSPR_MASK, BOOKE,	0,		{RS}},
5845 {"hwsync",	XSYNC(31,598,0), 0xffffffff, POWER4,	BOOKE|PPC476,	{0}},
5849 {"sync",	X(31,598),     XSYNC_MASK,   PPCCOM,	BOOKE|PPC476,	{LS}},
5850 {"msync",	X(31,598),     0xffffffff, BOOKE|PPCA2|PPC476, 0,	{0}},
5851 {"sync",	X(31,598),     0xffffffff,   BOOKE|PPC476, E6500,	{0}},
6007 {"dcba",	X(31,758), XRT_MASK, PPC405|PPC7450|BOOKE|PPCA2|PPC476, 0, {RA0, RB}},
6039 {"tlbivax",	X(31,786),	XRT_MASK, BOOKE|PPCA2|PPC476, 0,	{RA0, RB}},
6105 {"eieio",	X(31,854),	0xffffffff,  PPC,   BOOKE|PPCA2|PPC476,	{0}},
6106 {"mbar",	X(31,854),	X_MASK,	   BOOKE|PPCA2|PPC476, 0,	{MO}},
6150 {"tlbsx",	XRC(31,914,0),	X_MASK, PPC403|BOOKE|PPCA2|PPC476, 0,	{RTO, RA0, RB}},
6151 {"tlbsx.",	XRC(31,914,1),	X_MASK, PPC403|BOOKE|PPCA2|PPC476, 0,	{RTO, RA0, RB}},
6196 {"tlbre",	X(31,946),  X_MASK, PPC403|BOOKE|PPCA2|PPC476, 0,	{RSO, RAOPT, SHO}},
6225 {"tlbld",	X(31,978),	XRTRA_MASK,  PPC, PPC403|BOOKE|PPCA2|PPC476, {RB}},
6228 {"tlbwe",	X(31,978),  X_MASK, PPC403|BOOKE|PPCA2|PPC476, 0,	{RSO, RAOPT, SHO}},