Lines Matching +full:0 +full:xff400000
14 #define SS_MEMSAVE 0x00 /* First 8 bytes of RAM */
15 #define SS_HID 0x08 /* 3 HIDs */
16 #define SS_IABR 0x14 /* 2 IABRs */
17 #define SS_IBCR 0x1c
18 #define SS_DABR 0x20 /* 2 DABRs */
19 #define SS_DBCR 0x28
20 #define SS_SP 0x2c
21 #define SS_SR 0x30 /* 16 segment registers */
22 #define SS_R2 0x70
23 #define SS_MSR 0x74
24 #define SS_SDR1 0x78
25 #define SS_LR 0x7c
26 #define SS_SPRG 0x80 /* 8 SPRGs */
27 #define SS_DBAT 0xa0 /* 8 DBATs */
28 #define SS_IBAT 0xe0 /* 8 IBATs */
29 #define SS_TB 0x120
30 #define SS_CR 0x128
31 #define SS_GPREG 0x12c /* r12-r31 */
32 #define STATE_SAVE_SIZE 0x17c
40 .long 0
53 * The first word is the magic number 0xf5153ae5, and the second
63 lwz r5, 0(r4)
66 stw r5, SS_MEMSAVE+0(r3)
73 stw r5, SS_HID+0(r3)
84 stw r4, SS_IABR+0(r3)
87 stw r7, SS_DABR+0(r3)
97 stw r4, SS_SPRG+0(r3)
118 stw r4, SS_DBAT+0x00(r3)
119 stw r5, SS_DBAT+0x04(r3)
120 stw r6, SS_DBAT+0x08(r3)
121 stw r7, SS_DBAT+0x0c(r3)
128 stw r4, SS_DBAT+0x10(r3)
129 stw r5, SS_DBAT+0x14(r3)
130 stw r6, SS_DBAT+0x18(r3)
131 stw r7, SS_DBAT+0x1c(r3)
138 stw r4, SS_DBAT+0x20(r3)
139 stw r5, SS_DBAT+0x24(r3)
140 stw r6, SS_DBAT+0x28(r3)
141 stw r7, SS_DBAT+0x2c(r3)
148 stw r4, SS_DBAT+0x30(r3)
149 stw r5, SS_DBAT+0x34(r3)
150 stw r6, SS_DBAT+0x38(r3)
151 stw r7, SS_DBAT+0x3c(r3)
158 stw r4, SS_IBAT+0x00(r3)
159 stw r5, SS_IBAT+0x04(r3)
160 stw r6, SS_IBAT+0x08(r3)
161 stw r7, SS_IBAT+0x0c(r3)
168 stw r4, SS_IBAT+0x10(r3)
169 stw r5, SS_IBAT+0x14(r3)
170 stw r6, SS_IBAT+0x18(r3)
171 stw r7, SS_IBAT+0x1c(r3)
178 stw r4, SS_IBAT+0x20(r3)
179 stw r5, SS_IBAT+0x24(r3)
180 stw r6, SS_IBAT+0x28(r3)
181 stw r7, SS_IBAT+0x2c(r3)
188 stw r4, SS_IBAT+0x30(r3)
189 stw r5, SS_IBAT+0x34(r3)
190 stw r6, SS_IBAT+0x38(r3)
191 stw r7, SS_IBAT+0x3c(r3)
209 stw r4, SS_TB+0(r3)
214 li r4, 0
218 addis r4, r4, 0x1000
219 cmpwi r4, 0
224 rlwinm r4, r4, 0, ~MSR_CE
225 rlwinm r4, r4, 0, ~MSR_ME
229 #define TMP_VIRT_IMMR 0xf0000000
230 #define DEFAULT_IMMR_VALUE 0xff400000
231 #define IMMRBAR_BASE 0x0000
238 ori r4, r4, 0x002a
241 ori r4, r8, 0x001e /* 1 MByte accessible from Kernel Space only */
248 ori r4, r4, 0x002a
250 lis r9, (TMP_VIRT_IMMR + 0x01000000)@h
251 ori r4, r9, 0x001e /* 1 MByte accessible from Kernel Space only */
260 li r4, 0x0002
263 ori r4, r4, 0x001e /* 1 MByte accessible from Kernel Space only */
282 lis r6, 0xf515
283 ori r6, r6, 0x3ae5
290 stw r6, 0(r5)
295 li r4, 0
296 stw r4, 0x0024(r8)
297 stw r4, 0x002c(r8)
298 stw r4, 0x0034(r8)
299 stw r4, 0x003c(r8)
300 stw r4, 0x0064(r8)
301 stw r4, 0x006c(r8)
312 lwz r3, 0x0b04(r8)
324 lwz r4, 0(r4)
334 lwz r4, 0x0904(r8)
335 andis. r4, r4, 0x0400
336 li r4, 0
338 lis r4, 0xff80
340 stw r4, 0x0020(r8)
341 lis r7, 0x8000
342 ori r7, r7, 0x0016
345 rlwinm r5, r5, 0, ~(HID0_DOZE | HID0_NAP)
361 stw r7, 0x0024(r8)
375 rlwinm r4, r4, 0, ~(MSR_IR | MSR_DR)
387 lwz r5, SS_MEMSAVE+0(r3)
390 stw r5, 0(0)
391 stw r6, 4(0)
393 lwz r5, SS_HID+0(r3)
401 lwz r4, SS_IABR+0(r3)
404 lwz r7, SS_DABR+0(r3)
415 li r4, 0
419 addis r4, r4, 0x1000
420 cmpwi r4, 0
423 lwz r4, SS_DBAT+0x00(r3)
424 lwz r5, SS_DBAT+0x04(r3)
425 lwz r6, SS_DBAT+0x08(r3)
426 lwz r7, SS_DBAT+0x0c(r3)
433 lwz r4, SS_DBAT+0x10(r3)
434 lwz r5, SS_DBAT+0x14(r3)
435 lwz r6, SS_DBAT+0x18(r3)
436 lwz r7, SS_DBAT+0x1c(r3)
443 lwz r4, SS_DBAT+0x20(r3)
444 lwz r5, SS_DBAT+0x24(r3)
445 lwz r6, SS_DBAT+0x28(r3)
446 lwz r7, SS_DBAT+0x2c(r3)
453 lwz r4, SS_DBAT+0x30(r3)
454 lwz r5, SS_DBAT+0x34(r3)
455 lwz r6, SS_DBAT+0x38(r3)
456 lwz r7, SS_DBAT+0x3c(r3)
463 lwz r4, SS_IBAT+0x00(r3)
464 lwz r5, SS_IBAT+0x04(r3)
465 lwz r6, SS_IBAT+0x08(r3)
466 lwz r7, SS_IBAT+0x0c(r3)
473 lwz r4, SS_IBAT+0x10(r3)
474 lwz r5, SS_IBAT+0x14(r3)
475 lwz r6, SS_IBAT+0x18(r3)
476 lwz r7, SS_IBAT+0x1c(r3)
483 lwz r4, SS_IBAT+0x20(r3)
484 lwz r5, SS_IBAT+0x24(r3)
485 lwz r6, SS_IBAT+0x28(r3)
486 lwz r7, SS_IBAT+0x2c(r3)
493 lwz r4, SS_IBAT+0x30(r3)
494 lwz r5, SS_IBAT+0x34(r3)
495 lwz r6, SS_IBAT+0x38(r3)
496 lwz r7, SS_IBAT+0x3c(r3)
513 lwz r4, SS_SPRG+0(r3)
535 li r4, 0
538 lwz r4, SS_TB+0(r3)