Lines Matching refs:mfdcri
671 val = mfdcri(SDR0, port->sdr_base + sdr_offset); in ppc4xx_pciex_wait_on_sdr()
733 if (!(mfdcri(SDR0, PESDR0_PLLLCT1) & 0x01000000)) { in ppc440spe_pciex_check_reset()
746 valPE0 = mfdcri(SDR0, PESDR0_440SPE_RCSSET); in ppc440spe_pciex_check_reset()
747 valPE1 = mfdcri(SDR0, PESDR1_440SPE_RCSSET); in ppc440spe_pciex_check_reset()
748 valPE2 = mfdcri(SDR0, PESDR2_440SPE_RCSSET); in ppc440spe_pciex_check_reset()
813 if (!(mfdcri(SDR0, PESDR0_PLLLCT2) & 0x10000)) { in ppc440spe_pciex_core_init()
816 mfdcri(SDR0, PESDR0_PLLLCT2)); in ppc440spe_pciex_core_init()
825 if (!(mfdcri(SDR0, PESDR0_PLLLCT3) & 0x10000000)) { in ppc440spe_pciex_core_init()
995 mfdcri(SDR0, port->sdr_base + PESDRn_RCSSET) | in ppc460ex_pciex_init_port_hw()
1002 while (!(mfdcri(SDR0, PESDR0_460EX_RSTSTA) & 0x1)) in ppc460ex_pciex_init_port_hw()
1006 while (!(mfdcri(SDR0, PESDR1_460EX_RSTSTA) & 0x1)) in ppc460ex_pciex_init_port_hw()
1012 (mfdcri(SDR0, port->sdr_base + PESDRn_RCSSET) & in ppc460ex_pciex_init_port_hw()
1091 mfdcri(SDR0, port->sdr_base + PESDRn_RCSSET) | in apm821xx_pciex_init_port_hw()
1101 (mfdcri(SDR0, port->sdr_base + PESDRn_RCSSET) & in apm821xx_pciex_init_port_hw()
1193 if (((mfdcri(SDR0, PESDR1_460SX_HSSCTLSET) & 0x00000001) == in ppc460sx_pciex_core_init()
1288 while (!(mfdcri(SDR0, port->sdr_base + PESDRn_405EX_PHYSTA) & 0x00001000)) in ppc405ex_pcie_phy_reset()
1319 val = mfdcri(SDR0, port->sdr_base + PESDRn_LOOP); in ppc405ex_pciex_init_port_hw()