Lines Matching +full:0 +full:- +full:128
1 /* SPDX-License-Identifier: GPL-2.0-or-later */
65 .pvr_mask = 0xffff0000,
66 .pvr_value = 0x00390000,
71 .icache_bsize = 128,
72 .dcache_bsize = 128,
80 .pvr_mask = 0xffff0000,
81 .pvr_value = 0x003c0000,
86 .icache_bsize = 128,
87 .dcache_bsize = 128,
94 { /* PPC970MP DD1.0 - no DEEPNAP, use regular 970 init */
95 .pvr_mask = 0xffffffff,
96 .pvr_value = 0x00440100,
101 .icache_bsize = 128,
102 .dcache_bsize = 128,
110 .pvr_mask = 0xffff0000,
111 .pvr_value = 0x00440000,
116 .icache_bsize = 128,
117 .dcache_bsize = 128,
125 .pvr_mask = 0xffff0000,
126 .pvr_value = 0x00450000,
131 .icache_bsize = 128,
132 .dcache_bsize = 128,
139 .pvr_mask = 0xffff0000,
140 .pvr_value = 0x003a0000,
145 .icache_bsize = 128,
146 .dcache_bsize = 128,
152 .pvr_mask = 0xffffff00,
153 .pvr_value = 0x003b0300,
158 .icache_bsize = 128,
159 .dcache_bsize = 128,
164 .pvr_mask = 0xffff0000,
165 .pvr_value = 0x003b0000,
170 .icache_bsize = 128,
171 .dcache_bsize = 128,
176 { /* POWER6 in P5+ mode; 2.04-compliant processor */
177 .pvr_mask = 0xffffffff,
178 .pvr_value = 0x0f000001,
183 .icache_bsize = 128,
184 .dcache_bsize = 128,
188 .pvr_mask = 0xffff0000,
189 .pvr_value = 0x003e0000,
194 .icache_bsize = 128,
195 .dcache_bsize = 128,
200 { /* 2.05-compliant processor, i.e. Power6 "architected" mode */
201 .pvr_mask = 0xffffffff,
202 .pvr_value = 0x0f000002,
207 .icache_bsize = 128,
208 .dcache_bsize = 128,
211 { /* 2.06-compliant processor, i.e. Power7 "architected" mode */
212 .pvr_mask = 0xffffffff,
213 .pvr_value = 0x0f000003,
219 .icache_bsize = 128,
220 .dcache_bsize = 128,
226 { /* 2.07-compliant processor, i.e. Power8 "architected" mode */
227 .pvr_mask = 0xffffffff,
228 .pvr_value = 0x0f000004,
234 .icache_bsize = 128,
235 .dcache_bsize = 128,
241 { /* 3.00-compliant processor, i.e. Power9 "architected" mode */
242 .pvr_mask = 0xffffffff,
243 .pvr_value = 0x0f000005,
249 .icache_bsize = 128,
250 .dcache_bsize = 128,
255 { /* 3.1-compliant processor, i.e. Power10 "architected" mode */
256 .pvr_mask = 0xffffffff,
257 .pvr_value = 0x0f000006,
263 .icache_bsize = 128,
264 .dcache_bsize = 128,
270 .pvr_mask = 0xffff0000,
271 .pvr_value = 0x003f0000,
277 .icache_bsize = 128,
278 .dcache_bsize = 128,
287 .pvr_mask = 0xffff0000,
288 .pvr_value = 0x004A0000,
294 .icache_bsize = 128,
295 .dcache_bsize = 128,
304 .pvr_mask = 0xffff0000,
305 .pvr_value = 0x004b0000,
311 .icache_bsize = 128,
312 .dcache_bsize = 128,
321 .pvr_mask = 0xffff0000,
322 .pvr_value = 0x004c0000,
328 .icache_bsize = 128,
329 .dcache_bsize = 128,
338 .pvr_mask = 0xffff0000,
339 .pvr_value = 0x004d0000,
345 .icache_bsize = 128,
346 .dcache_bsize = 128,
354 { /* Power9 DD2.0 */
355 .pvr_mask = 0xffffefff,
356 .pvr_value = 0x004e0200,
362 .icache_bsize = 128,
363 .dcache_bsize = 128,
372 .pvr_mask = 0xffffefff,
373 .pvr_value = 0x004e0201,
379 .icache_bsize = 128,
380 .dcache_bsize = 128,
389 .pvr_mask = 0xffffefff,
390 .pvr_value = 0x004e0202,
396 .icache_bsize = 128,
397 .dcache_bsize = 128,
406 .pvr_mask = 0xffff0000,
407 .pvr_value = 0x004e0000,
413 .icache_bsize = 128,
414 .dcache_bsize = 128,
423 .pvr_mask = 0xffff0000,
424 .pvr_value = 0x00800000,
430 .icache_bsize = 128,
431 .dcache_bsize = 128,
440 .pvr_mask = 0xffff0000,
441 .pvr_value = 0x00700000,
447 .icache_bsize = 128,
448 .dcache_bsize = 128,
451 .platform = "ppc-cell-be",
454 .pvr_mask = 0x7fff0000,
455 .pvr_value = 0x00900000,
469 .pvr_mask = 0x00000000,
470 .pvr_value = 0x00000000,
475 .icache_bsize = 128,
476 .dcache_bsize = 128,