powerpc/crypto/poly1305-p10le_64.S

1 /* SPDX-License-Identifier: GPL-2.0-or-later */
5 # Copyright 2023- IBM Corp. All rights reserved
10 # Poly1305 - this version mainly using vector/VSX/Scalar
11 #  - 26 bits limbs
12 #  - Handle multiple 64 byte blcok.
17 # p = 2^130 - 5
25 #  07/22/21 - this revison based on the above sum of products.  Setup r^4, r^3, r^2, r and s3, s2, …
56 #include <asm/asm-offsets.h>
57 #include <asm/asm-compat.h>
95 	stdu 1,-752(1)
100 	SAVE_GPR 17, 136, 1
133 	SAVE_VSX 17, 240, 9
168 	RESTORE_VSX 17, 240, 9
187 	RESTORE_GPR 17, 136, 1
223 	vmulouw	12, 7, 1
230 	vaddudm	14, 14, 12
234 	vmulouw	12, 7, 2
236 	vaddudm	15, 15, 12
243 	vmulouw	12, 7, 3
245 	vaddudm	16, 16, 12
247 	vmulouw	17, 4, 29
250 	vaddudm	17, 17, 10
251 	vaddudm	17, 17, 11
252 	vmulouw	12, 7, 26
254 	vaddudm	17, 17, 12
255 	vaddudm	17, 17, 13	# x3
261 	vmulouw	12, 7, 27
263 	vaddudm	18, 18, 12
271 	vmuleuw	12, 7, 1
276 	vaddudm	14, 14, 12
282 	vmuleuw	12, 7, 2
287 	vaddudm	15, 15, 12
293 	vmuleuw	12, 7, 3
298 	vaddudm	16, 16, 12
304 	vmuleuw	12, 7, 26
306 	vaddudm	17, 17, 9
307 	vaddudm	17, 17, 10
308 	vaddudm	17, 17, 11
309 	vaddudm	17, 17, 12
310 	vaddudm	17, 17, 13	# x3
315 	vmuleuw	12, 7, 27
320 	vaddudm	18, 18, 12
378 	vsld	12, 30, 13
382 	vaddudm	3, 12, 30
394 	vsld	12, 30, 13
398 	vaddudm	3, 12, 30
430 	vsld	12, 30, 13
434 	vaddudm	3, 12, 30
444 	vsrd	11, 17, 31
445 	vand	7, 17, 25
448 	vsrd	12, 18, 31
454 	vaddudm	4, 4, 12
455 	vsld	10, 12, 9
480 	ld	12, 8(10)
486 	lvx	25, 0, 10	# v25 - mask
497 	and.	10, 10, 12
501 	extrdi	15, 9, 26, 12
502 	extrdi	16, 9, 12, 0
506 	extrdi	17, 10, 26, 24
509 	mtvsrdd	61, 0, 17
549 	extrdi	15, 9, 26, 12
550 	extrdi	16, 9, 12, 0
554 	extrdi	17, 10, 26, 24
557 	mtvsrdd	39, 0, 17
566 	addi	17, 20, 16
567 	lxvw4x	44, 0, 17
568 	vperm	14, 11, 12, 17
569 	vperm	15, 11, 12, 18
572 	vsrd	11, 10, 31	# 12 bits left
574 	vspltisb 13, 12
576 	vsld	12, 16, 13
577 	vor	11, 11, 12
580 	vsrd	12, 15, 13	# >> 14
581 	vsrd	13, 12, 31	# >> 26, a4
582 	vand	12, 12, 25	# a3
587 	vaddudm	23, 7, 12
591 	addi	17, 17, 16
592 	lxvw4x	43, 0, 17
593 	addi	17, 17, 16
594 	lxvw4x	44, 0, 17
595 	vperm	14, 11, 12, 17
596 	vperm	15, 11, 12, 18
599 	vsrd	11, 10, 31	# 12 bits left
601 	vspltisb 13, 12
603 	vsld	12, 16, 13
605 	vor	11, 11, 12
607 	vsrd	12, 15, 13	# >> 14
608 	vsrd	13, 12, 31	# >> 26, a4
609 	vand	12, 12, 25	# a3
615 	vmrgow	7, 12, 23
619 	addi	5, 5, -64	# len -= 64
633 # h3 = (h1 + m3) * r^2,	h4 = (h2 + m4) * r^2  --> (h0 + m1) r*4 + (h3 + m3) r^2, (h0 + m2) r^4 + (h…
635 # h5 = (h3 + m5) * r^2,	h6 = (h4 + m6) * r^2  -->
636 # h7 = (h5 + m7) * r^2,	h8 = (h6 + m8) * r^1  --> m5 * r^4 + m6 * r^3 + m7 * r^2 + m8 * r
646 	vsrd	11, 17, 31
647 	vand	7, 17, 25
650 	vsrd	12, 18, 31
656 	vaddudm	4, 4, 12
657 	vsld	10, 12, 9
677 	addi	17, 20, 16
678 	lxvw4x	44, 0, 17
679 	vperm	14, 11, 12, 17
680 	vperm	15, 11, 12, 18
681 	addi	17, 17, 16
682 	lxvw4x	43, 0, 17
683 	addi	17, 17, 16
684 	lxvw4x	44, 0, 17
685 	vperm	17, 11, 12, 17
686 	vperm	18, 11, 12, 18
689 	vand	9, 17, 25	# a0
691 	vsrd	22, 21, 31	# 12 bits left
692 	vsrd	10, 17, 31	# >> 26
693 	vsrd	11, 10, 31	# 12 bits left
698 	vspltisb 13, 12
704 	vsld	12, 16, 13
705 	vor	11, 11, 12
711 	vsrd	12, 18, 13	# >> 14
712 	vsrd	13, 12, 31	# >> 26, a4
713 	vand	12, 12, 25	# a3
725 	vmrgow	7, 12, 7
729 	addi	5, 5, -64	# len -= 64
760 	vaddudm	7, 17, 12
773 	vsrd	12, 8, 31
779 	vaddudm	4, 4, 12
780 	vsld	10, 12, 9
805 	vspltisb 11, 12
806 	vsrd	12, 6, 11
812 	vor	21, 7, 12
817 	mfvsrld	17, 52
821 	std	17, 0(3)
847 	ld	12, 8(10)
854 	and.	10, 10, 12	# cramp mask r1
857         add     19, 21, 10      # s1: r19 - (r1 >> 2) *5
923 #   - no highbit if final leftover block (highbit = 0)
931 	stdu 1,-400(1)
936 	SAVE_GPR 17, 136, 1
1002 	RESTORE_GPR 17, 136, 1
1036 	ld	12, 16(3)
1039 	# h + 5 + (-p)
1042 	mr	8, 12
1051 	mr	12, 8
1058 	addze	12, 12