Lines Matching +full:timebase +full:- +full:frequency
1 // SPDX-License-Identifier: GPL-2.0-or-later
5 * Copyright 2016 Elettra-Sincrotrone Trieste S.C.p.A.
8 /dts-v1/;
11 #address-cells = <1>;
12 #size-cells = <1>;
13 interrupt-parent = <&mpic>;
27 #address-cells = <1>;
28 #size-cells = <0>;
33 d-cache-line-size = <32>;
34 i-cache-line-size = <32>;
35 d-cache-size = <32768>;
36 i-cache-size = <32768>;
37 timebase-frequency = <0>;
38 bus-frequency = <0>;
39 clock-frequency = <0>;
45 d-cache-line-size = <32>;
46 i-cache-line-size = <32>;
47 d-cache-size = <32768>;
48 i-cache-size = <32768>;
49 timebase-frequency = <0>;
50 bus-frequency = <0>;
51 clock-frequency = <0>;