71 	u32 t;  in ar71xx_pci_get_ble()  local
73 	t = ar71xx_pci_ble_table[size & 3][where & 3];  in ar71xx_pci_get_ble()
74 	BUG_ON(t == 0xf);  in ar71xx_pci_get_ble()
75 	t <<= (local) ? 20 : 4;  in ar71xx_pci_get_ble()
77 	return t;  in ar71xx_pci_get_ble()
258 	u32 t;  in ar71xx_pci_irq_unmask()  local
263 	t = __raw_readl(base + AR71XX_RESET_REG_PCI_INT_ENABLE);  in ar71xx_pci_irq_unmask()
264 	__raw_writel(t | (1 << irq), base + AR71XX_RESET_REG_PCI_INT_ENABLE);  in ar71xx_pci_irq_unmask()
275 	u32 t;  in ar71xx_pci_irq_mask()  local
280 	t = __raw_readl(base + AR71XX_RESET_REG_PCI_INT_ENABLE);  in ar71xx_pci_irq_mask()
281 	__raw_writel(t & ~(1 << irq), base + AR71XX_RESET_REG_PCI_INT_ENABLE);  in ar71xx_pci_irq_mask()
332 	u32 t;  in ar71xx_pci_probe()  local
371 	t = PCI_COMMAND_MEMORY | PCI_COMMAND_MASTER | PCI_COMMAND_INVALIDATE  in ar71xx_pci_probe()
373 	ar71xx_pci_local_write(apc, PCI_COMMAND, 4, t);  in ar71xx_pci_probe()