Lines Matching refs:p
146 static void kvm_mips_build_save_scratch(u32 **p, unsigned int tmp, in kvm_mips_build_save_scratch() argument
150 UASM_i_MFC0(p, tmp, scratch_vcpu[0], scratch_vcpu[1]); in kvm_mips_build_save_scratch()
151 UASM_i_SW(p, tmp, offsetof(struct pt_regs, cp0_epc), frame); in kvm_mips_build_save_scratch()
155 UASM_i_MFC0(p, tmp, scratch_tmp[0], scratch_tmp[1]); in kvm_mips_build_save_scratch()
156 UASM_i_SW(p, tmp, offsetof(struct pt_regs, cp0_cause), frame); in kvm_mips_build_save_scratch()
160 static void kvm_mips_build_restore_scratch(u32 **p, unsigned int tmp, in kvm_mips_build_restore_scratch() argument
167 UASM_i_LW(p, tmp, offsetof(struct pt_regs, cp0_epc), frame); in kvm_mips_build_restore_scratch()
168 UASM_i_MTC0(p, tmp, scratch_vcpu[0], scratch_vcpu[1]); in kvm_mips_build_restore_scratch()
171 UASM_i_LW(p, tmp, offsetof(struct pt_regs, cp0_cause), frame); in kvm_mips_build_restore_scratch()
172 UASM_i_MTC0(p, tmp, scratch_tmp[0], scratch_tmp[1]); in kvm_mips_build_restore_scratch()
184 static inline void build_set_exc_base(u32 **p, unsigned int reg) in build_set_exc_base() argument
188 uasm_i_ori(p, reg, reg, MIPS_EBASE_WG); in build_set_exc_base()
189 UASM_i_MTC0(p, reg, C0_EBASE); in build_set_exc_base()
191 uasm_i_mtc0(p, reg, C0_EBASE); in build_set_exc_base()
211 u32 *p = addr; in kvm_mips_build_vcpu_run() local
219 UASM_i_ADDIU(&p, K1, SP, -(int)sizeof(struct pt_regs)); in kvm_mips_build_vcpu_run()
223 UASM_i_SW(&p, i, offsetof(struct pt_regs, regs[i]), K1); in kvm_mips_build_vcpu_run()
227 uasm_i_mfc0(&p, V0, C0_STATUS); in kvm_mips_build_vcpu_run()
228 UASM_i_SW(&p, V0, offsetof(struct pt_regs, cp0_status), K1); in kvm_mips_build_vcpu_run()
231 kvm_mips_build_save_scratch(&p, V1, K1); in kvm_mips_build_vcpu_run()
234 UASM_i_MTC0(&p, A0, scratch_vcpu[0], scratch_vcpu[1]); in kvm_mips_build_vcpu_run()
237 UASM_i_ADDIU(&p, K1, A0, offsetof(struct kvm_vcpu, arch)); in kvm_mips_build_vcpu_run()
243 UASM_i_SW(&p, SP, offsetof(struct kvm_vcpu_arch, host_stack), K1); in kvm_mips_build_vcpu_run()
246 UASM_i_SW(&p, GP, offsetof(struct kvm_vcpu_arch, host_gp), K1); in kvm_mips_build_vcpu_run()
252 UASM_i_LA(&p, K0, ST0_EXL | KSU_USER | ST0_BEV | ST0_KX_IF_64); in kvm_mips_build_vcpu_run()
253 uasm_i_mtc0(&p, K0, C0_STATUS); in kvm_mips_build_vcpu_run()
254 uasm_i_ehb(&p); in kvm_mips_build_vcpu_run()
257 UASM_i_LW(&p, K0, offsetof(struct kvm_vcpu_arch, guest_ebase), K1); in kvm_mips_build_vcpu_run()
258 build_set_exc_base(&p, K0); in kvm_mips_build_vcpu_run()
265 uasm_i_addiu(&p, K0, ZERO, ST0_EXL | KSU_USER | ST0_IE | ST0_KX_IF_64); in kvm_mips_build_vcpu_run()
266 uasm_i_andi(&p, V0, V0, ST0_IM); in kvm_mips_build_vcpu_run()
267 uasm_i_or(&p, K0, K0, V0); in kvm_mips_build_vcpu_run()
268 uasm_i_mtc0(&p, K0, C0_STATUS); in kvm_mips_build_vcpu_run()
269 uasm_i_ehb(&p); in kvm_mips_build_vcpu_run()
271 p = kvm_mips_build_enter_guest(p); in kvm_mips_build_vcpu_run()
273 return p; in kvm_mips_build_vcpu_run()
288 u32 *p = addr; in kvm_mips_build_enter_guest() local
299 UASM_i_LW(&p, T0, offsetof(struct kvm_vcpu_arch, pc), K1); in kvm_mips_build_enter_guest()
300 UASM_i_MTC0(&p, T0, C0_EPC); in kvm_mips_build_enter_guest()
304 UASM_i_MFC0(&p, K0, C0_PWBASE); in kvm_mips_build_enter_guest()
306 UASM_i_MFC0(&p, K0, c0_kscratch(), pgd_reg); in kvm_mips_build_enter_guest()
307 UASM_i_SW(&p, K0, offsetof(struct kvm_vcpu_arch, host_pgd), K1); in kvm_mips_build_enter_guest()
317 UASM_i_LW(&p, S0, (int)offsetof(struct kvm_vcpu, kvm) - in kvm_mips_build_enter_guest()
319 UASM_i_LW(&p, A0, offsetof(struct kvm, arch.gpa_mm.pgd), S0); in kvm_mips_build_enter_guest()
320 UASM_i_LA(&p, T9, (unsigned long)tlbmiss_handler_setup_pgd); in kvm_mips_build_enter_guest()
321 uasm_i_jalr(&p, RA, T9); in kvm_mips_build_enter_guest()
324 UASM_i_MTC0(&p, A0, C0_PWBASE); in kvm_mips_build_enter_guest()
326 uasm_i_nop(&p); in kvm_mips_build_enter_guest()
329 uasm_i_addiu(&p, V1, ZERO, 1); in kvm_mips_build_enter_guest()
330 uasm_i_mfc0(&p, K0, C0_GUESTCTL0); in kvm_mips_build_enter_guest()
331 uasm_i_ins(&p, K0, V1, MIPS_GCTL0_GM_SHIFT, 1); in kvm_mips_build_enter_guest()
332 uasm_i_mtc0(&p, K0, C0_GUESTCTL0); in kvm_mips_build_enter_guest()
341 uasm_i_mfc0(&p, T0, C0_GUESTCTL1); in kvm_mips_build_enter_guest()
343 uasm_i_ext(&p, T1, T0, MIPS_GCTL1_ID_SHIFT, in kvm_mips_build_enter_guest()
345 uasm_i_ins(&p, T0, T1, MIPS_GCTL1_RID_SHIFT, in kvm_mips_build_enter_guest()
347 uasm_i_mtc0(&p, T0, C0_GUESTCTL1); in kvm_mips_build_enter_guest()
356 UASM_i_MFC0(&p, K0, C0_ENTRYHI); in kvm_mips_build_enter_guest()
357 UASM_i_SW(&p, K0, offsetof(struct kvm_vcpu_arch, host_entryhi), in kvm_mips_build_enter_guest()
361 UASM_i_ADDIU(&p, T1, S0, in kvm_mips_build_enter_guest()
366 uasm_i_lw(&p, T2, offsetof(struct thread_info, cpu), GP); in kvm_mips_build_enter_guest()
368 uasm_i_sll(&p, T2, T2, ilog2(sizeof(long))); in kvm_mips_build_enter_guest()
369 UASM_i_ADDU(&p, T3, T1, T2); in kvm_mips_build_enter_guest()
370 UASM_i_LW(&p, K0, 0, T3); in kvm_mips_build_enter_guest()
376 uasm_i_addiu(&p, T3, ZERO, sizeof(struct cpuinfo_mips)/sizeof(long)); in kvm_mips_build_enter_guest()
377 uasm_i_mul(&p, T2, T2, T3); in kvm_mips_build_enter_guest()
379 UASM_i_LA_mostly(&p, AT, (long)&cpu_data[0].asid_mask); in kvm_mips_build_enter_guest()
380 UASM_i_ADDU(&p, AT, AT, T2); in kvm_mips_build_enter_guest()
381 UASM_i_LW(&p, T2, uasm_rel_lo((long)&cpu_data[0].asid_mask), AT); in kvm_mips_build_enter_guest()
382 uasm_i_and(&p, K0, K0, T2); in kvm_mips_build_enter_guest()
384 uasm_i_andi(&p, K0, K0, MIPS_ENTRYHI_ASID); in kvm_mips_build_enter_guest()
388 uasm_i_mtc0(&p, K0, C0_ENTRYHI); in kvm_mips_build_enter_guest()
390 uasm_i_ehb(&p); in kvm_mips_build_enter_guest()
393 uasm_i_mtc0(&p, ZERO, C0_HWRENA); in kvm_mips_build_enter_guest()
400 UASM_i_LW(&p, i, offsetof(struct kvm_vcpu_arch, gprs[i]), K1); in kvm_mips_build_enter_guest()
405 UASM_i_LW(&p, K0, offsetof(struct kvm_vcpu_arch, hi), K1); in kvm_mips_build_enter_guest()
406 uasm_i_mthi(&p, K0); in kvm_mips_build_enter_guest()
408 UASM_i_LW(&p, K0, offsetof(struct kvm_vcpu_arch, lo), K1); in kvm_mips_build_enter_guest()
409 uasm_i_mtlo(&p, K0); in kvm_mips_build_enter_guest()
413 UASM_i_LW(&p, K0, offsetof(struct kvm_vcpu_arch, gprs[K0]), K1); in kvm_mips_build_enter_guest()
414 UASM_i_LW(&p, K1, offsetof(struct kvm_vcpu_arch, gprs[K1]), K1); in kvm_mips_build_enter_guest()
417 uasm_i_eret(&p); in kvm_mips_build_enter_guest()
421 return p; in kvm_mips_build_enter_guest()
435 u32 *p = addr; in kvm_mips_build_tlb_refill_exception() local
447 UASM_i_MTC0(&p, K1, scratch_tmp[0], scratch_tmp[1]); in kvm_mips_build_tlb_refill_exception()
450 UASM_i_MFC0(&p, K1, scratch_vcpu[0], scratch_vcpu[1]); in kvm_mips_build_tlb_refill_exception()
453 UASM_i_SW(&p, K0, offsetof(struct kvm_vcpu, arch.gprs[K0]), K1); in kvm_mips_build_tlb_refill_exception()
462 UASM_i_MFC0(&p, K1, C0_PGD); in kvm_mips_build_tlb_refill_exception()
463 uasm_i_lddir(&p, K0, K1, 3); /* global page dir */ in kvm_mips_build_tlb_refill_exception()
465 uasm_i_lddir(&p, K1, K0, 1); /* middle page dir */ in kvm_mips_build_tlb_refill_exception()
467 uasm_i_ldpte(&p, K1, 0); /* even */ in kvm_mips_build_tlb_refill_exception()
468 uasm_i_ldpte(&p, K1, 1); /* odd */ in kvm_mips_build_tlb_refill_exception()
469 uasm_i_tlbwr(&p); in kvm_mips_build_tlb_refill_exception()
483 build_get_pmde64(&p, &l, &r, K0, K1); /* get pmd in K1 */ in kvm_mips_build_tlb_refill_exception()
485 build_get_pgde32(&p, K0, K1); /* get pgd in K1 */ in kvm_mips_build_tlb_refill_exception()
490 build_get_ptep(&p, K0, K1); in kvm_mips_build_tlb_refill_exception()
491 build_update_entries(&p, K0, K1); in kvm_mips_build_tlb_refill_exception()
492 build_tlb_write_entry(&p, &l, &r, tlb_random); in kvm_mips_build_tlb_refill_exception()
498 UASM_i_MFC0(&p, K1, scratch_vcpu[0], scratch_vcpu[1]); in kvm_mips_build_tlb_refill_exception()
501 UASM_i_LW(&p, K0, offsetof(struct kvm_vcpu, arch.gprs[K0]), K1); in kvm_mips_build_tlb_refill_exception()
502 uasm_i_ehb(&p); in kvm_mips_build_tlb_refill_exception()
503 UASM_i_MFC0(&p, K1, scratch_tmp[0], scratch_tmp[1]); in kvm_mips_build_tlb_refill_exception()
506 uasm_i_eret(&p); in kvm_mips_build_tlb_refill_exception()
508 return p; in kvm_mips_build_tlb_refill_exception()
523 u32 *p = addr; in kvm_mips_build_exception() local
533 UASM_i_MTC0(&p, K1, scratch_tmp[0], scratch_tmp[1]); in kvm_mips_build_exception()
536 UASM_i_MFC0(&p, K1, scratch_vcpu[0], scratch_vcpu[1]); in kvm_mips_build_exception()
537 UASM_i_ADDIU(&p, K1, K1, offsetof(struct kvm_vcpu, arch)); in kvm_mips_build_exception()
540 UASM_i_SW(&p, K0, offsetof(struct kvm_vcpu_arch, gprs[K0]), K1); in kvm_mips_build_exception()
543 uasm_il_b(&p, &r, label_exit_common); in kvm_mips_build_exception()
544 uasm_i_nop(&p); in kvm_mips_build_exception()
549 return p; in kvm_mips_build_exception()
565 u32 *p = addr; in kvm_mips_build_exit() local
590 UASM_i_SW(&p, i, offsetof(struct kvm_vcpu_arch, gprs[i]), K1); in kvm_mips_build_exit()
595 uasm_i_mfhi(&p, T0); in kvm_mips_build_exit()
596 UASM_i_SW(&p, T0, offsetof(struct kvm_vcpu_arch, hi), K1); in kvm_mips_build_exit()
598 uasm_i_mflo(&p, T0); in kvm_mips_build_exit()
599 UASM_i_SW(&p, T0, offsetof(struct kvm_vcpu_arch, lo), K1); in kvm_mips_build_exit()
603 uasm_i_ehb(&p); in kvm_mips_build_exit()
604 UASM_i_MFC0(&p, T0, scratch_tmp[0], scratch_tmp[1]); in kvm_mips_build_exit()
605 UASM_i_SW(&p, T0, offsetof(struct kvm_vcpu_arch, gprs[K1]), K1); in kvm_mips_build_exit()
610 UASM_i_MFC0(&p, S0, scratch_vcpu[0], scratch_vcpu[1]); in kvm_mips_build_exit()
616 UASM_i_MFC0(&p, K0, C0_EPC); in kvm_mips_build_exit()
617 UASM_i_SW(&p, K0, offsetof(struct kvm_vcpu_arch, pc), K1); in kvm_mips_build_exit()
619 UASM_i_MFC0(&p, K0, C0_BADVADDR); in kvm_mips_build_exit()
620 UASM_i_SW(&p, K0, offsetof(struct kvm_vcpu_arch, host_cp0_badvaddr), in kvm_mips_build_exit()
623 uasm_i_mfc0(&p, K0, C0_CAUSE); in kvm_mips_build_exit()
624 uasm_i_sw(&p, K0, offsetof(struct kvm_vcpu_arch, host_cp0_cause), K1); in kvm_mips_build_exit()
627 uasm_i_mfc0(&p, K0, C0_BADINSTR); in kvm_mips_build_exit()
628 uasm_i_sw(&p, K0, offsetof(struct kvm_vcpu_arch, in kvm_mips_build_exit()
633 uasm_i_mfc0(&p, K0, C0_BADINSTRP); in kvm_mips_build_exit()
634 uasm_i_sw(&p, K0, offsetof(struct kvm_vcpu_arch, in kvm_mips_build_exit()
642 uasm_i_mfc0(&p, V0, C0_STATUS); in kvm_mips_build_exit()
644 uasm_i_lui(&p, AT, ST0_BEV >> 16); in kvm_mips_build_exit()
645 uasm_i_or(&p, K0, V0, AT); in kvm_mips_build_exit()
647 uasm_i_mtc0(&p, K0, C0_STATUS); in kvm_mips_build_exit()
648 uasm_i_ehb(&p); in kvm_mips_build_exit()
650 UASM_i_LA_mostly(&p, K0, (long)&ebase); in kvm_mips_build_exit()
651 UASM_i_LW(&p, K0, uasm_rel_lo((long)&ebase), K0); in kvm_mips_build_exit()
652 build_set_exc_base(&p, K0); in kvm_mips_build_exit()
659 uasm_i_lui(&p, AT, ST0_CU1 >> 16); in kvm_mips_build_exit()
660 uasm_i_and(&p, V1, V0, AT); in kvm_mips_build_exit()
661 uasm_il_beqz(&p, &r, V1, label_fpu_1); in kvm_mips_build_exit()
662 uasm_i_nop(&p); in kvm_mips_build_exit()
663 uasm_i_cfc1(&p, T0, 31); in kvm_mips_build_exit()
664 uasm_i_sw(&p, T0, offsetof(struct kvm_vcpu_arch, fpu.fcr31), in kvm_mips_build_exit()
666 uasm_i_ctc1(&p, ZERO, 31); in kvm_mips_build_exit()
667 uasm_l_fpu_1(&l, p); in kvm_mips_build_exit()
675 uasm_i_mfc0(&p, T0, C0_CONFIG5); in kvm_mips_build_exit()
676 uasm_i_ext(&p, T0, T0, 27, 1); /* MIPS_CONF5_MSAEN */ in kvm_mips_build_exit()
677 uasm_il_beqz(&p, &r, T0, label_msa_1); in kvm_mips_build_exit()
678 uasm_i_nop(&p); in kvm_mips_build_exit()
679 uasm_i_cfcmsa(&p, T0, MSA_CSR); in kvm_mips_build_exit()
680 uasm_i_sw(&p, T0, offsetof(struct kvm_vcpu_arch, fpu.msacsr), in kvm_mips_build_exit()
682 uasm_i_ctcmsa(&p, MSA_CSR, ZERO); in kvm_mips_build_exit()
683 uasm_l_msa_1(&l, p); in kvm_mips_build_exit()
688 UASM_i_LW(&p, K0, offsetof(struct kvm_vcpu_arch, host_entryhi), in kvm_mips_build_exit()
690 UASM_i_MTC0(&p, K0, C0_ENTRYHI); in kvm_mips_build_exit()
699 UASM_i_LW(&p, A0, in kvm_mips_build_exit()
701 UASM_i_LA(&p, T9, (unsigned long)tlbmiss_handler_setup_pgd); in kvm_mips_build_exit()
702 uasm_i_jalr(&p, RA, T9); in kvm_mips_build_exit()
705 UASM_i_MTC0(&p, A0, C0_PWBASE); in kvm_mips_build_exit()
707 uasm_i_nop(&p); in kvm_mips_build_exit()
710 uasm_i_mfc0(&p, K0, C0_GUESTCTL0); in kvm_mips_build_exit()
711 uasm_i_ins(&p, K0, ZERO, MIPS_GCTL0_GM_SHIFT, 1); in kvm_mips_build_exit()
712 uasm_i_mtc0(&p, K0, C0_GUESTCTL0); in kvm_mips_build_exit()
715 uasm_i_sw(&p, K0, in kvm_mips_build_exit()
723 uasm_i_mfc0(&p, T0, C0_GUESTCTL1); in kvm_mips_build_exit()
725 uasm_i_ins(&p, T0, ZERO, MIPS_GCTL1_RID_SHIFT, in kvm_mips_build_exit()
727 uasm_i_mtc0(&p, T0, C0_GUESTCTL1); in kvm_mips_build_exit()
731 uasm_i_addiu(&p, AT, ZERO, ~(ST0_EXL | KSU_USER | ST0_IE)); in kvm_mips_build_exit()
732 uasm_i_and(&p, V0, V0, AT); in kvm_mips_build_exit()
733 uasm_i_lui(&p, AT, ST0_CU0 >> 16); in kvm_mips_build_exit()
734 uasm_i_or(&p, V0, V0, AT); in kvm_mips_build_exit()
736 uasm_i_ori(&p, V0, V0, ST0_SX | ST0_UX); in kvm_mips_build_exit()
738 uasm_i_mtc0(&p, V0, C0_STATUS); in kvm_mips_build_exit()
739 uasm_i_ehb(&p); in kvm_mips_build_exit()
742 UASM_i_LW(&p, GP, offsetof(struct kvm_vcpu_arch, host_gp), K1); in kvm_mips_build_exit()
745 UASM_i_LW(&p, SP, offsetof(struct kvm_vcpu_arch, host_stack), K1); in kvm_mips_build_exit()
748 UASM_i_ADDIU(&p, SP, SP, -(int)sizeof(struct pt_regs)); in kvm_mips_build_exit()
756 kvm_mips_build_restore_scratch(&p, K0, SP); in kvm_mips_build_exit()
759 UASM_i_LA_mostly(&p, K0, (long)&hwrena); in kvm_mips_build_exit()
760 uasm_i_lw(&p, K0, uasm_rel_lo((long)&hwrena), K0); in kvm_mips_build_exit()
761 uasm_i_mtc0(&p, K0, C0_HWRENA); in kvm_mips_build_exit()
769 uasm_i_move(&p, A0, S0); in kvm_mips_build_exit()
770 UASM_i_LA(&p, T9, (unsigned long)kvm_mips_handle_exit); in kvm_mips_build_exit()
771 uasm_i_jalr(&p, RA, T9); in kvm_mips_build_exit()
772 UASM_i_ADDIU(&p, SP, SP, -CALLFRAME_SIZ); in kvm_mips_build_exit()
776 p = kvm_mips_build_ret_from_exit(p); in kvm_mips_build_exit()
778 return p; in kvm_mips_build_exit()
792 u32 *p = addr; in kvm_mips_build_ret_from_exit() local
802 uasm_i_di(&p, ZERO); in kvm_mips_build_ret_from_exit()
803 uasm_i_ehb(&p); in kvm_mips_build_ret_from_exit()
811 uasm_i_move(&p, K1, S0); in kvm_mips_build_ret_from_exit()
812 UASM_i_ADDIU(&p, K1, K1, offsetof(struct kvm_vcpu, arch)); in kvm_mips_build_ret_from_exit()
818 uasm_i_andi(&p, T0, V0, RESUME_HOST); in kvm_mips_build_ret_from_exit()
819 uasm_il_bnez(&p, &r, T0, label_return_to_host); in kvm_mips_build_ret_from_exit()
820 uasm_i_nop(&p); in kvm_mips_build_ret_from_exit()
822 p = kvm_mips_build_ret_to_guest(p); in kvm_mips_build_ret_from_exit()
824 uasm_l_return_to_host(&l, p); in kvm_mips_build_ret_from_exit()
825 p = kvm_mips_build_ret_to_host(p); in kvm_mips_build_ret_from_exit()
829 return p; in kvm_mips_build_ret_from_exit()
843 u32 *p = addr; in kvm_mips_build_ret_to_guest() local
846 UASM_i_MTC0(&p, S0, scratch_vcpu[0], scratch_vcpu[1]); in kvm_mips_build_ret_to_guest()
849 UASM_i_LW(&p, T0, offsetof(struct kvm_vcpu_arch, guest_ebase), K1); in kvm_mips_build_ret_to_guest()
852 uasm_i_mfc0(&p, V1, C0_STATUS); in kvm_mips_build_ret_to_guest()
853 uasm_i_lui(&p, AT, ST0_BEV >> 16); in kvm_mips_build_ret_to_guest()
854 uasm_i_or(&p, K0, V1, AT); in kvm_mips_build_ret_to_guest()
855 uasm_i_mtc0(&p, K0, C0_STATUS); in kvm_mips_build_ret_to_guest()
856 uasm_i_ehb(&p); in kvm_mips_build_ret_to_guest()
857 build_set_exc_base(&p, T0); in kvm_mips_build_ret_to_guest()
860 uasm_i_ori(&p, V1, V1, ST0_EXL | KSU_USER | ST0_IE); in kvm_mips_build_ret_to_guest()
861 UASM_i_LA(&p, AT, ~(ST0_CU0 | ST0_MX | ST0_SX | ST0_UX)); in kvm_mips_build_ret_to_guest()
862 uasm_i_and(&p, V1, V1, AT); in kvm_mips_build_ret_to_guest()
863 uasm_i_mtc0(&p, V1, C0_STATUS); in kvm_mips_build_ret_to_guest()
864 uasm_i_ehb(&p); in kvm_mips_build_ret_to_guest()
866 p = kvm_mips_build_enter_guest(p); in kvm_mips_build_ret_to_guest()
868 return p; in kvm_mips_build_ret_to_guest()
883 u32 *p = addr; in kvm_mips_build_ret_to_host() local
887 UASM_i_LW(&p, K1, offsetof(struct kvm_vcpu_arch, host_stack), K1); in kvm_mips_build_ret_to_host()
888 UASM_i_ADDIU(&p, K1, K1, -(int)sizeof(struct pt_regs)); in kvm_mips_build_ret_to_host()
894 uasm_i_sra(&p, K0, V0, 2); in kvm_mips_build_ret_to_host()
895 uasm_i_move(&p, V0, K0); in kvm_mips_build_ret_to_host()
901 UASM_i_LW(&p, i, offsetof(struct pt_regs, regs[i]), K1); in kvm_mips_build_ret_to_host()
905 UASM_i_LA_mostly(&p, K0, (long)&hwrena); in kvm_mips_build_ret_to_host()
906 uasm_i_lw(&p, K0, uasm_rel_lo((long)&hwrena), K0); in kvm_mips_build_ret_to_host()
907 uasm_i_mtc0(&p, K0, C0_HWRENA); in kvm_mips_build_ret_to_host()
910 UASM_i_LW(&p, RA, offsetof(struct pt_regs, regs[RA]), K1); in kvm_mips_build_ret_to_host()
911 uasm_i_jr(&p, RA); in kvm_mips_build_ret_to_host()
912 uasm_i_nop(&p); in kvm_mips_build_ret_to_host()
914 return p; in kvm_mips_build_ret_to_host()