Lines Matching refs:UINT64_CAST
75 #define NSRI_8BITMODE_MASK (UINT64_CAST 0x1 << 30)
77 #define NSRI_LINKUP_MASK (UINT64_CAST 0x1 << 29)
79 #define NSRI_DOWNREASON_MASK (UINT64_CAST 0x1 << 28) /* out of reset. */
81 #define NSRI_MORENODES_MASK (UINT64_CAST 1 << 18) /* Max. # of nodes */
85 #define NSRI_REGIONSIZE_MASK (UINT64_CAST 1 << 17) /* Granularity */
89 #define NSRI_NODEID_MASK (UINT64_CAST 0x1ff << 8)/* Node (Hub) ID */
91 #define NSRI_REV_MASK (UINT64_CAST 0xf << 4) /* Chip Revision */
93 #define NSRI_CHIPID_MASK (UINT64_CAST 0xf) /* Chip type ID */
104 #define NPR_PORTRESET (UINT64_CAST 1 << 7) /* Send warm reset */
105 #define NPR_LINKRESET (UINT64_CAST 1 << 1) /* Send link reset */
106 #define NPR_LOCALRESET (UINT64_CAST 1) /* Reset entire hub */
110 #define NPROT_RESETOK (UINT64_CAST 1)
115 #define NGP_MAXRETRY_MASK (UINT64_CAST 0x3ff << 48)
117 #define NGP_TAILTOWRAP_MASK (UINT64_CAST 0xffff << 32)
120 #define NGP_CREDITTOVAL_MASK (UINT64_CAST 0xf << 16)
122 #define NGP_TAILTOVAL_MASK (UINT64_CAST 0xf << 4)
126 #define NDP_PORTTORESET (UINT64_CAST 1 << 18) /* Port tmout reset */
127 #define NDP_LLP8BITMODE (UINT64_CAST 1 << 12) /* LLP 8-bit mode */
128 #define NDP_PORTDISABLE (UINT64_CAST 1 << 6) /* Port disable */
129 #define NDP_SENDERROR (UINT64_CAST 1) /* Send data error */
137 #define NVP_PIOID_MASK (UINT64_CAST 0x3ff << 40)
139 #define NVP_WRITEID_MASK (UINT64_CAST 0xff << 32)
140 #define NVP_ADDRESS_MASK (UINT64_CAST 0xffff8) /* Bits 19:3 */
142 #define NVP_TYPE_MASK (UINT64_CAST 0x3)
146 #define NVS_VALID (UINT64_CAST 1 << 63)
147 #define NVS_OVERRUN (UINT64_CAST 1 << 62)
149 #define NVS_TARGET_MASK (UINT64_CAST 0x3ff << 51)
151 #define NVS_PIOID_MASK (UINT64_CAST 0x3ff << 40)
153 #define NVS_WRITEID_MASK (UINT64_CAST 0xff << 32)
154 #define NVS_ADDRESS_MASK (UINT64_CAST 0xfffffff8) /* Bits 31:3 */
156 #define NVS_TYPE_MASK (UINT64_CAST 0x7)
157 #define NVS_ERROR_MASK (UINT64_CAST 0x4) /* bit set means error */
172 #define NAGE_VCH_MASK (UINT64_CAST 3 << 10)
174 #define NAGE_CC_MASK (UINT64_CAST 3 << 8)
176 #define NAGE_AGE_MASK (UINT64_CAST 0xff)
186 #define NPP_NULLTO_MASK (UINT64_CAST 0x3f << 16)
188 #define NPP_MAXBURST_MASK (UINT64_CAST 0x3ff)
189 #define NPP_RESET_DFLT_HUB20 ((UINT64_CAST 1 << NPP_NULLTO_SHFT) | \
190 (UINT64_CAST 0x3f0 << NPP_MAXBURST_SHFT))
191 #define NPP_RESET_DEFAULTS ((UINT64_CAST 6 << NPP_NULLTO_SHFT) | \
192 (UINT64_CAST 0x3f0 << NPP_MAXBURST_SHFT))
197 #define NPE_LINKRESET (UINT64_CAST 1 << 37)
198 #define NPE_INTERNALERROR (UINT64_CAST 1 << 36)
199 #define NPE_BADMESSAGE (UINT64_CAST 1 << 35)
200 #define NPE_BADDEST (UINT64_CAST 1 << 34)
201 #define NPE_FIFOOVERFLOW (UINT64_CAST 1 << 33)
203 #define NPE_CREDITTO_MASK (UINT64_CAST 0xf << 28)
205 #define NPE_TAILTO_MASK (UINT64_CAST 0xf << 24)
207 #define NPE_RETRYCOUNT_MASK (UINT64_CAST 0xff << 16)
209 #define NPE_CBERRCOUNT_MASK (UINT64_CAST 0xff << 8)
211 #define NPE_SNERRCOUNT_MASK (UINT64_CAST 0xff << 0)
223 #define NMT_EXIT_PORT_MASK (UINT64_CAST 0xf)
227 #define NLT_EXIT_PORT_MASK (UINT64_CAST 0xf)