Lines Matching defs:sgimc_regs

16 struct sgimc_regs {  struct
17 u32 _unused0;
18 volatile u32 cpuctrl0; /* CPU control register 0, readwrite */
38 u32 _unused1;
39 volatile u32 cpuctrl1; /* CPU control register 1, readwrite */
48 u32 _unused2;
49 volatile u32 watchdogt; /* Watchdog reg rdonly, write clears */
51 u32 _unused3;
52 volatile u32 systemid; /* MC system ID register, readonly */
56 u32 _unused4[3];
57 volatile u32 divider; /* Divider reg for RPSS */
59 u32 _unused5;
60 u32 eeprom; /* EEPROM byte reg for r4k */
67 u32 _unused6[3];
68 volatile u32 rcntpre; /* Preload refresh counter */
70 u32 _unused7;
71 volatile u32 rcounter; /* Readonly refresh counter */
73 u32 _unused8[13];
74 volatile u32 giopar; /* Parameter word for GIO64 */
92 u32 _unused9;
93 volatile u32 cputp; /* CPU bus arb time period */
95 u32 _unused10[3];
96 volatile u32 lbursttp; /* Time period for long bursts */
100 u32 _unused11[9];
101 volatile u32 mconfig0; /* Memory config register zero */
102 u32 _unused12;
103 volatile u32 mconfig1; /* Memory config register one */
109 u32 _unused13;
110 volatile u32 cmacc; /* Mem access config for CPU */
111 u32 _unused14;
112 volatile u32 gmacc; /* Mem access config for GIO */
118 u32 _unused15;
119 volatile u32 cerr; /* Error address reg for CPU */
120 u32 _unused16;
121 volatile u32 cstat; /* Status reg for CPU */
131 u32 _unused17;
132 volatile u32 gerr; /* Error address reg for GIO */
133 u32 _unused18;
134 volatile u32 gstat; /* Status reg for GIO */
145 u32 _unused19;
146 volatile u32 syssembit; /* Uni-bit system semaphore */
147 u32 _unused20;
148 volatile u32 mlock; /* Global GIO memory access lock */
149 u32 _unused21;
150 volatile u32 elock; /* Locks EISA from GIO accesses */
153 u32 _unused22[15];
154 volatile u32 gio_dma_trans; /* DMA mask to translation GIO addrs */
155 u32 _unused23;
156 volatile u32 gio_dma_sbits; /* DMA GIO addr substitution bits */
157 u32 _unused24;
158 volatile u32 dma_intr_cause; /* DMA IRQ cause indicator bits */
159 u32 _unused25;
160 volatile u32 dma_ctrl; /* Main DMA control reg */
163 u32 _unused26[5];
164 volatile u32 dtlb_hi0;
165 u32 _unused27;
166 volatile u32 dtlb_lo0;
169 u32 _unused28;
170 volatile u32 dtlb_hi1;
171 u32 _unused29;
172 volatile u32 dtlb_lo1;
175 u32 _unused30;
176 volatile u32 dtlb_hi2;
177 u32 _unused31;
178 volatile u32 dtlb_lo2;
181 u32 _unused32;
182 volatile u32 dtlb_hi3;
183 u32 _unused33;
184 volatile u32 dtlb_lo3;
186 u32 _unused34[0x0392];
188 u32 _unused35;
189 volatile u32 rpsscounter; /* Chirps at 100ns */
191 u32 _unused36[0x1000/4-2*4];
193 u32 _unused37;
217 extern struct sgimc_regs *sgimc; argument