asm/pci/bridge.h

71 struct bridge_regs {  struct
75 	widget_cfg_t	    b_widget;			/* 0x000000 */
92 	u32	_pad_000058;
93 	u32	b_wid_aux_err;		/* 0x00005C */
94 	u32	_pad_000060;
95 	u32	b_wid_resp_upper;		/* 0x000064 */
96 	u32	_pad_000068;
97 	u32	b_wid_resp_lower;		/* 0x00006C */
98 	u32	_pad_000070;
99 	u32	 b_wid_tst_pin_ctrl;		/* 0x000074 */
100 	u32	_pad_000078[2];
103 	u32	_pad_000080;
104 	u32	b_dir_map;			/* 0x000084 */
105 	u32	_pad_000088[2];
108 	u32	_pad_000090;
109 	u32	b_ram_perr;			/* 0x000094 */
110 	u32	_pad_000098[2];
113 	u32	_pad_0000A0;
114 	u32	b_arb;				/* 0x0000A4 */
115 	u32	_pad_0000A8[2];
118 	u32	_pad_0000B0;
119 	u32	b_nic;				/* 0x0000B4 */
120 	u32	_pad_0000B8[2];
123 	u32	_pad_0000C0;
124 	u32	b_bus_timeout;			/* 0x0000C4 */
127 	u32	_pad_0000C8;
128 	u32	b_pci_cfg;			/* 0x0000CC */
129 	u32	_pad_0000D0;
130 	u32	b_pci_err_upper;		/* 0x0000D4 */
131 	u32	_pad_0000D8;
132 	u32	b_pci_err_lower;		/* 0x0000DC */
133 	u32	_pad_0000E0[8];
138 	u32	_pad_000100;
139 	u32	b_int_status;			/* 0x000104 */
140 	u32	_pad_000108;
141 	u32	b_int_enable;			/* 0x00010C */
142 	u32	_pad_000110;
143 	u32	b_int_rst_stat;			/* 0x000114 */
144 	u32	_pad_000118;
145 	u32	b_int_mode;			/* 0x00011C */
146 	u32	_pad_000120;
147 	u32	b_int_device;			/* 0x000124 */
148 	u32	_pad_000128;
149 	u32	b_int_host_err;			/* 0x00012C */
151 	struct {
154 	} b_int_addr[8];				/* 0x000130 */
156 	u32	_pad_000170[36];
159 	struct {
162 	} b_device[8];					/* 0x000200 */
164 	struct {
167 	} b_wr_req_buf[8];				/* 0x000240 */
169 	struct {
172 	} b_rrb_map[2];					/* 0x000280 */
176 	u32	_pad_000290;
177 	u32	b_resp_status;			/* 0x000294 */
178 	u32	_pad_000298;
179 	u32	b_resp_clear;			/* 0x00029C */
181 	u32	_pad_0002A0[24];
183 	char		_pad_000300[0x10000 - 0x000300];
186 	union {
192 	}			    b_int_ate_ram[128];
194 	char	_pad_010400[0x11000 - 0x010400];
197 	struct {
200 	} b_int_ate_ram_lo[128];
202 	char	_pad_011400[0x20000 - 0x011400];
205 	union {				/* make all access sizes available. */
216 	} b_type0_cfg_dev[8];					/* 0x020000 */
219 	union {				/* make all access sizes available. */
224 	} b_type1_cfg;					/* 0x028000-0x029000 */
226 	char	_pad_029000[0x007000];			/* 0x029000-0x030000 */
229 	union {
234 	} b_pci_iack;						/* 0x030000 */
236 	u8	_pad_030007[0x04fff8];			/* 0x030008-0x07FFFF */
239 	u64	b_ext_ate_ram[0x10000];
242 	char	_pad_100000[0x200000-0x100000];
245 	union {				/* make all access sizes available. */
250 	} b_devio_raw[10];				/* 0x200000 */
259 	union {		/* make all access sizes available. */
264 	} b_external_flash;			/* 0xC00000 */