Lines Matching +full:processor +full:- +full:intensive
1 # SPDX-License-Identifier: GPL-2.0
135 bool "Generic board-agnostic MIPS kernel"
191 bool "Alchemy processor based machines"
224 Support for the Texas Instruments AR7 System-on-a-Chip
298 Build a generic DT-based kernel image that boots on select
299 BCM33xx cable modem chips, BCM63xx DSL chips, and BCM7xxx set-top
391 see the Linux/MIPS FAQ on <http://www.linux-mips.org/> and the
392 DECstation porting pages on <http://decstation.unix-ag.org/>.
432 Olivetti M700-10 workstations.
468 bool "Loongson 32-bit family of machines"
471 This enables support for the Loongson-1 family of machines.
473 Loongson-1 is a family of 32-bit MIPS-compatible SoCs developed by
478 bool "Loongson-2E/F family of machines"
481 This enables the support of early Loongson-2E/F family of machines.
484 bool "Loongson 64-bit family of machines"
519 This enables the support of Loongson-2/3 family of machines.
521 Loongson-2 and Loongson-3 are 64-bit general-purpose processors with
522 GS264/GS464/GS464E/GS464V microarchitecture (except old Loongson-2E
523 and Loongson-2F which will be removed), developed by the Institute
588 Microchip PIC32 is a family of general-purpose 32 bit MIPS core
741 This is the SGI Indigo2 with R10000 processor. To compile a Linux
798 bool "Sibyte BCM91125C-CRhone"
808 bool "Sibyte BCM91125E-Rhone"
817 bool "Sibyte BCM91250A-SWARM"
830 bool "Sibyte BCM91250C2-LittleSur"
842 bool "Sibyte BCM91250E-Sentosa"
852 bool "Sibyte BCM91480B-BigSur"
901 The SNI RM200/300/400 are MIPS-based machines manufactured by
985 source "arch/mips/sgi-ip27/Kconfig"
988 source "arch/mips/cavium-octeon/Kconfig"
1266 bool "Loongson 64-bit CPU"
1288 The Loongson GSx64(GS264/GS464/GS464E/GS464V) series of processor
1290 including most 64-bit Loongson-2 (2H, 2K) and Loongson-3 (3A1000,
1292 Loongson-2E/2F is not covered here and will be removed in future.
1295 bool "New Loongson-3 CPU Enhancements"
1299 New Loongson-3 cores (since Loongson-3A R2, as opposed to Loongson-3A
1300 R1, Loongson-3B R1 and Loongson-3B R2) has many enhancements, such as
1301 FTLB, L1-VCache, EI/DI/Wait/Prefetch instruction, DSP/DSPr2 ASE, User
1302 Local register, Read-Inhibit/Execute-Inhibit, SFB (Store Fill Buffer),
1307 please say 'N' here. If you want a high-performance kernel to run on
1308 new Loongson-3 machines only, please say 'Y' here.
1311 bool "Loongson-3 LLSC Workarounds"
1315 Loongson-3 processors have the llsc issues which require workarounds.
1325 Loongson-3A R4 and newer have the CPUCFG instruction available for
1328 cores, back to Loongson-3A1000.
1337 The Loongson 2E processor implements the MIPS III instruction set
1348 The Loongson 2F processor implements the MIPS III instruction set
1351 Loongson2F have built-in DDR2 and PCIX controller. The PCIX controller
1361 The Loongson 1B is a 32-bit SoC, which implements the MIPS32
1371 The Loongson 1C is a 32-bit SoC, which implements the MIPS32
1383 MIPS32 architecture. Most modern embedded systems with a 32-bit
1384 MIPS processor are based on a MIPS32 processor. If you know the
1385 specific type of processor in your system, choose those that one
1388 years so chances are you even have a MIPS32 Release 2 processor
1402 MIPS32 architecture. Most modern embedded systems with a 32-bit
1403 MIPS processor are based on a MIPS32 processor. If you know the
1404 specific type of processor in your system, choose those that one
1419 family, are based on a MIPS32r5 processor. If you own an older
1420 processor, you probably need to select MIPS32r1 or MIPS32r2 instead.
1435 family, are based on a MIPS32r6 processor. If you own an older
1436 processor, you probably need to select MIPS32r1 or MIPS32r2 instead.
1448 MIPS64 architecture. Many modern embedded systems with a 64-bit
1449 MIPS processor are based on a MIPS64 processor. If you know the
1450 specific type of processor in your system, choose those that one
1453 years so chances are you even have a MIPS64 Release 2 processor
1469 MIPS64 architecture. Many modern embedded systems with a 64-bit
1470 MIPS processor are based on a MIPS64 processor. If you know the
1471 specific type of processor in your system, choose those that one
1506 family, are based on a MIPS64r6 processor. If you own an older
1507 processor, you probably need to select MIPS64r1 or MIPS64r2 instead.
1524 MMU with two-levels TLB, UCA, MSA, MDU core level features and system
1526 cache, IOCU/IOMMU (though might be unused depending on the system-
1551 MIPS Technologies R4300-series processors.
1560 MIPS Technologies R4000-series processors other than 4300, including
1578 MIPS Technologies R5000-series processors other than the Nevada.
1587 NEC VR5500 and VR5500A series processors implement 64-bit MIPS IV
1597 QED / PMC-Sierra RM52xx-series ("Nevada") processors.
1608 MIPS Technologies R10000-series processors.
1629 bool "Cavium Octeon processor"
1641 The Cavium Octeon processor is a highly integrated chip containing
1642 many ethernet hardware widgets for networking tasks. The processor
1714 64-bit addressing which in turn makes the PTEs 64-bit in size.
1733 -mfix-loongson2f-nop and -mfix-loongson2f-jump options.
1904 # CPU may reorder R->R, R->W, W->R, W->W
1912 # CPU may reorder R->LL, R->LL, W->LL, W->LL, R->SC, R->SC, W->SC, W->SC
2012 actually benefits from 64-bit processing or if your machine has
2014 menu if your system does not support both 32-bit and 64-bit kernels.
2017 bool "32-bit kernel"
2021 Select this option if you want to build a 32-bit kernel.
2024 bool "64-bit kernel"
2027 Select this option if you want to build a 64-bit kernel.
2052 This is only used if non-zero.
2063 R3000-family processors this is the only available page size. Using
2083 all non-R3000 family processors. Note that you will need a suitable
2102 all non-R3000 family processor. Not that at the time of this
2132 # Support for a MIPS32 / MIPS64 style S-caches
2211 <http://www.imgtec.com/mips/mips-multithreading.asp>.
2232 bool "Dynamic FPU affinity for FP-intensive threads"
2237 bool "MIPS R2-to-R6 emulator"
2242 Choose this option if you want to run non-R6 MIPS userland code.
2245 The only reason this is a build-time option is to save ~14K from the
2417 # CPU non-features
2422 # - The `daddi' instruction fails to trap on overflow.
2423 # "MIPS R4000PC/SC Errata, Processor Revision 2.2 and 3.0",
2426 # - The `daddiu' instruction can produce an incorrect result.
2427 # "MIPS R4000PC/SC Errata, Processor Revision 2.2 and 3.0",
2429 # "MIPS R4000MC Errata, Processor Revision 2.2 and 3.0", erratum
2431 # "MIPS R4400PC/SC Errata, Processor Revision 1.0", erratum #7
2432 # "MIPS R4400MC Errata, Processor Revision 1.0", erratum #5
2438 # - A double-word or a variable shift may give an incorrect result
2440 # "MIPS R4000PC/SC Errata, Processor Revision 2.2 and 3.0",
2442 # "MIPS R4000MC Errata, Processor Revision 2.2 and 3.0", erratum
2445 # - A double-word or a variable shift may give an incorrect result
2447 # "MIPS R4000PC/SC Errata, Processor Revision 2.2 and 3.0",
2450 # - An integer division may give an incorrect result if started in
2452 # "MIPS R4000PC/SC Errata, Processor Revision 2.2 and 3.0",
2460 # - A double-word or a variable shift may give an incorrect result
2462 # "MIPS R4400MC Errata, Processor Revision 1.0", erratum #10
2463 # "MIPS R4400MC Errata, Processor Revision 2.0 & 3.0", erratum #4
2490 # interrupts during indexed I-cache flushes seems to be sufficient to deal
2542 # The RM7000 processors and the E9000 cores have a bug (though PMC-Sierra
2544 # I-cache line worth of instructions being fetched may case spurious
2550 # may cause ll / sc and lld / scd sequences to execute non-atomically.
2559 # - Highmem only makes sense for the 32-bit kernel.
2560 # - The current highmem code will only work properly on physically indexed
2567 # - We use SYS_SUPPORTS_HIGHMEM to offer highmem only for systems where we
2591 This option must be set if a kernel might be executed on a MIPS16-
2593 words, it makes the kernel MIPS16-tolerant.
2612 Say Y to compile the kernel to support NUMA (Non-Uniform Memory
2682 This is limited by the size of KSEG0, 256Mb on 32-bit or 1Gb with
2683 EVA or 64-bit. The default is 16Mb.
2710 bool "Multi-Processing support"
2717 If you say N here, the kernel will run on uni- and multiprocessor
2726 See also the SMP-HOWTO available at
2732 bool "Support for hot-pluggable CPUs"
2766 int "Maximum number of CPUs (2-256)"
2776 kernel will support. The maximum supported value is 32 for 32-bit
2777 kernel and 64 for 64-bit kernels; the minimum value which makes
2781 This is purely to save memory - each supported CPU adds
2898 passed to the panic-ed kernel).
2901 bool "Support for O32 binaries using 64-bit FP" if !CPU_MIPSR6
2904 When this is enabled, the kernel will support use of 64-bit floating
2906 EF_MIPS_FP64 ELF header flag (typically built with -mfp64). On
2907 32-bit MIPS systems this support is at the cost of increasing the
2910 will require 64-bit floating point, you may wish to reduce the size
2952 objcopy --update-section .appended_dtb=<filename>.dtb vmlinux
3046 <http://www.computer-refuge.org/classiccmp/ftp.digital.com/pub/DEC/TriAdd/>
3048 <http://www.linux-mips.org/wiki/DECstation>
3092 32-bit binaries as used by the 32-bit Linux/MIPS port. Most of
3105 64-bit binaries using 32-bit quantities for addressing and certain
3106 data that would normally be 64-bit. They are used in special
3113 depends on $(cc-option,-mno-branch-likely)
3115 # https://github.com/llvm/llvm-project/issues/61045