Lines Matching +full:uart +full:- +full:w +full:- +full:state
1 /* SPDX-License-Identifier: GPL-2.0 */
5 * mcfuart.h -- ColdFire internal UART support defines.
7 * (C) Copyright 1999-2003, Greg Ungerer (gerg@snapgear.com)
23 unsigned int uartclk; /* UART clock rate */
27 * Define the ColdFire UART register set addresses.
29 #define MCFUART_UMR 0x00 /* Mode register (r/w) */
31 #define MCFUART_UCSR 0x04 /* Clock Select (w) */
32 #define MCFUART_UCR 0x08 /* Command register (w) */
34 #define MCFUART_UTB 0x0c /* Transmit Buffer (w) */
36 #define MCFUART_UACR 0x10 /* Auxiliary Control (w) */
38 #define MCFUART_UIMR 0x14 /* Interrupt Mask (w) */
39 #define MCFUART_UBG1 0x18 /* Baud Rate MSB (r/w) */
40 #define MCFUART_UBG2 0x1c /* Baud Rate LSB (r/w) */
42 #define MCFUART_UTF 0x28 /* Transmitter FIFO (r/w) */
43 #define MCFUART_URF 0x2c /* Receiver FIFO (r/w) */
44 #define MCFUART_UFPD 0x30 /* Frac Prec. Divider (r/w) */
49 #define MCFUART_UIVR 0x30 /* Interrupt Vector (r/w) */
52 #define MCFUART_UOP1 0x38 /* Output Port Bit Set (w) */
53 #define MCFUART_UOP0 0x3c /* Output Port Bit Reset (w) */
137 #define MCFUART_UIPCR_CTSCOS 0x10 /* CTS change of state */
160 #define MCFUART_UIR_COS 0x80 /* Change of state (CTS) */