Lines Matching refs:MCFINT1_VECBASE
37 #define MCFINT1_VECBASE (MCFINT0_VECBASE + 64) macro
38 #define MCFINT2_VECBASE (MCFINT1_VECBASE + 64)
146 #define MCF_IRQ_UART4 (MCFINT1_VECBASE + MCFINT1_UART4)
147 #define MCF_IRQ_UART5 (MCFINT1_VECBASE + MCFINT1_UART5)
148 #define MCF_IRQ_UART6 (MCFINT1_VECBASE + MCFINT1_UART6)
149 #define MCF_IRQ_UART7 (MCFINT1_VECBASE + MCFINT1_UART7)
150 #define MCF_IRQ_UART8 (MCFINT1_VECBASE + MCFINT1_UART8)
151 #define MCF_IRQ_UART9 (MCFINT1_VECBASE + MCFINT1_UART9)
183 #define MCF_IRQ_I2C1 (MCFINT1_VECBASE + MCFINT1_I2C1)
184 #define MCF_IRQ_I2C2 (MCFINT1_VECBASE + MCFINT1_I2C2)
185 #define MCF_IRQ_I2C3 (MCFINT1_VECBASE + MCFINT1_I2C3)
186 #define MCF_IRQ_I2C4 (MCFINT1_VECBASE + MCFINT1_I2C4)
187 #define MCF_IRQ_I2C5 (MCFINT1_VECBASE + MCFINT1_I2C5)
300 #define MCF_IRQ_DSPI1 (MCFINT1_VECBASE + MCFINT1_DSPI1)
311 #define MCFEDMA_IRQ_INTR16 (MCFINT1_VECBASE + MCFEDMA_EDMA_INTR16)
329 #define MCF_IRQ_IFL0 (MCFINT1_VECBASE + MCFINT1_FLEXCAN0_IFL)
330 #define MCF_IRQ_BOFF0 (MCFINT1_VECBASE + MCFINT1_FLEXCAN0_BOFF)
331 #define MCF_IRQ_ERR0 (MCFINT1_VECBASE + MCFINT1_FLEXCAN0_ERR)
332 #define MCF_IRQ_IFL1 (MCFINT1_VECBASE + MCFINT1_FLEXCAN1_IFL)
333 #define MCF_IRQ_BOFF1 (MCFINT1_VECBASE + MCFINT1_FLEXCAN1_BOFF)
334 #define MCF_IRQ_ERR1 (MCFINT1_VECBASE + MCFINT1_FLEXCAN1_ERR)