Lines Matching refs:u_char
166 u_char pad1;
167 u_char bas_hi;
168 u_char pad2;
169 u_char bas_md;
170 u_char pad3;
171 u_char volatile vcounthi;
172 u_char pad4;
173 u_char volatile vcountmid;
174 u_char pad5;
175 u_char volatile vcountlow;
176 u_char volatile syncmode;
177 u_char pad6;
178 u_char pad7;
179 u_char bas_lo;
194 u_char char_dummy0;
195 u_char bas_hi; /* video mem base addr, high and mid byte */
196 u_char char_dummy1;
197 u_char bas_md;
198 u_char char_dummy2;
199 u_char vcount_hi; /* pointer to currently displayed byte */
200 u_char char_dummy3;
201 u_char vcount_md;
202 u_char char_dummy4;
203 u_char vcount_lo;
205 u_char char_dummy5;
206 u_char bas_lo; /* video mem addr, low byte */
207 u_char char_dummy6[2+3*16];
210 u_char st_shiftmode; /* ST compatible shift mode register, unused */
211 u_char char_dummy7;
249 #define f030_hscroll ((u_char*) 0xffff8265)
255 u_char xoffset_s;
256 u_char xoffset;
258 u_char pad2[0x1a];
265 u_char pad3[0x14];
272 u_char pad4[0x12];
287 u_char dma_vhi; /* Some extended ST-DMAs can handle 32 bit addresses */
288 u_char dma_hi;
289 u_char char_dummy2;
290 u_char dma_md;
291 u_char char_dummy3;
292 u_char dma_lo;
311 u_char rd_data_reg_sel;
312 u_char char_dummy1;
313 u_char wd_data;
321 u_char char_dummy0;
322 u_char dma_addr_hi;
323 u_char char_dummy1;
324 u_char dma_addr_hmd;
325 u_char char_dummy2;
326 u_char dma_addr_lmd;
327 u_char char_dummy3;
328 u_char dma_addr_lo;
329 u_char char_dummy4;
330 u_char dma_cnt_hi;
331 u_char char_dummy5;
332 u_char dma_cnt_hmd;
333 u_char char_dummy6;
334 u_char dma_cnt_lmd;
335 u_char char_dummy7;
336 u_char dma_cnt_lo;
346 u_char scsi_data;
347 u_char char_dummy1;
348 u_char scsi_icr;
349 u_char char_dummy2;
350 u_char scsi_mode;
351 u_char char_dummy3;
352 u_char scsi_tcr;
353 u_char char_dummy4;
354 u_char scsi_idstat;
355 u_char char_dummy5;
356 u_char scsi_dmastat;
357 u_char char_dummy6;
358 u_char scsi_targrcv;
359 u_char char_dummy7;
360 u_char scsi_inircv;
375 u_char external_frequency_divider;
376 u_char internal_frequency_divider;
383 u_char tracks;
384 u_char input_source;
387 u_char adc_source;
390 u_char gain;
393 u_char attenuation;
396 u_char unused1;
397 u_char status;
400 u_char unused2, unused3, unused4, unused5;
401 u_char gpio_directions;
404 u_char unused6;
405 u_char gpio_data;
444 u_char cha_a_ctrl;
445 u_char char_dummy1;
446 u_char cha_a_data;
447 u_char char_dummy2;
448 u_char cha_b_ctrl;
449 u_char char_dummy3;
450 u_char cha_b_data;
481 u_char icr;
490 u_char cvr;
494 u_char isr;
503 u_char ivr;
506 u_char b[4];
520 u_char par_dt_reg;
521 u_char char_dummy1;
522 u_char active_edge;
523 u_char char_dummy2;
524 u_char data_dir;
525 u_char char_dummy3;
526 u_char int_en_a;
527 u_char char_dummy4;
528 u_char int_en_b;
529 u_char char_dummy5;
530 u_char int_pn_a;
531 u_char char_dummy6;
532 u_char int_pn_b;
533 u_char char_dummy7;
534 u_char int_sv_a;
535 u_char char_dummy8;
536 u_char int_sv_b;
537 u_char char_dummy9;
538 u_char int_mk_a;
539 u_char char_dummy10;
540 u_char int_mk_b;
541 u_char char_dummy11;
542 u_char vec_adr;
543 u_char char_dummy12;
544 u_char tim_ct_a;
545 u_char char_dummy13;
546 u_char tim_ct_b;
547 u_char char_dummy14;
548 u_char tim_ct_cd;
549 u_char char_dummy15;
550 u_char tim_dt_a;
551 u_char char_dummy16;
552 u_char tim_dt_b;
553 u_char char_dummy17;
554 u_char tim_dt_c;
555 u_char char_dummy18;
556 u_char tim_dt_d;
557 u_char char_dummy19;
558 u_char sync_char;
559 u_char char_dummy20;
560 u_char usart_ctr;
561 u_char char_dummy21;
562 u_char rcv_stat;
563 u_char char_dummy22;
564 u_char trn_stat;
565 u_char char_dummy23;
566 u_char usart_dta;
580 u_char sys_mask;
581 u_char char_dummy1;
582 u_char sys_stat;
583 u_char char_dummy2;
584 u_char softint;
585 u_char char_dummy3;
586 u_char vmeint;
587 u_char char_dummy4;
588 u_char gp_reg1;
589 u_char char_dummy5;
590 u_char gp_reg2;
591 u_char char_dummy6;
592 u_char vme_mask;
593 u_char char_dummy7;
594 u_char vme_stat;
602 u_char regsel;
603 u_char dummy;
604 u_char data;
653 u_char key_ctrl;
654 u_char char_dummy1;
655 u_char key_data;
656 u_char char_dummy2;
657 u_char mid_ctrl;
658 u_char char_dummy3;
659 u_char mid_data;
665 u_char int_ctrl; /* Falcon: Interrupt control */
666 u_char ctrl;
667 u_char pad2;
668 u_char bas_hi;
669 u_char pad3;
670 u_char bas_mid;
671 u_char pad4;
672 u_char bas_low;
673 u_char pad5;
674 u_char addr_hi;
675 u_char pad6;
676 u_char addr_mid;
677 u_char pad7;
678 u_char addr_low;
679 u_char pad8;
680 u_char end_hi;
681 u_char pad9;
682 u_char end_mid;
683 u_char pad10;
684 u_char end_low;
685 u_char pad11[12];
686 u_char track_select; /* Falcon */
687 u_char mode;
688 u_char pad12[14];
692 u_char ext_div;
693 u_char int_div;
694 u_char rec_track_select;
695 u_char dac_src;
696 u_char adc_src;
697 u_char input_gain;
771 u_char sec_ones;
772 u_char dummy1;
773 u_char sec_tens;
774 u_char dummy2;
775 u_char min_ones;
776 u_char dummy3;
777 u_char min_tens;
778 u_char dummy4;
779 u_char hr_ones;
780 u_char dummy5;
781 u_char hr_tens;
782 u_char dummy6;
783 u_char weekday;
784 u_char dummy7;
785 u_char day_ones;
786 u_char dummy8;
787 u_char day_tens;
788 u_char dummy9;
789 u_char mon_ones;
790 u_char dummy10;
791 u_char mon_tens;
792 u_char dummy11;
793 u_char year_ones;
794 u_char dummy12;
795 u_char year_tens;
796 u_char dummy13;
797 u_char mode;
798 u_char dummy14;
799 u_char test;
800 u_char dummy15;
801 u_char reset;