673 emulate_load_updates (update_t type, load_store_t ld, struct pt_regs *regs, unsigned long ifa)  in emulate_load_updates()  argument
681 	if (ld.x6_op == 1 || ld.x6_op == 3) {  in emulate_load_updates()
702 		imm = ld.x << 7 | ld.imm;  in emulate_load_updates()
707 		if (ld.m) imm |= SIGN_EXT9;  in emulate_load_updates()
715 		setreg(ld.r3, ifa, 0, regs);  in emulate_load_updates()
717 		DPRINT("ld.x=%d ld.m=%d imm=%ld r3=0x%lx\n", ld.x, ld.m, imm, ifa);  in emulate_load_updates()
719 	} else if (ld.m) {  in emulate_load_updates()
739 		getreg(ld.imm, &r2, &nat_r2, regs);  in emulate_load_updates()
746 		setreg(ld.r3, ifa, nat_r2, regs);  in emulate_load_updates()
748 		DPRINT("imm=%d r2=%ld r3=0x%lx nat_r2=%d\n",ld.imm, r2, ifa, nat_r2);  in emulate_load_updates()
769 emulate_load_int (unsigned long ifa, load_store_t ld, struct pt_regs *regs,  in emulate_load_int()  argument
772 	unsigned int len = 1 << ld.x6_sz;  in emulate_load_int()
789 		DPRINT("unknown size: x6=%d\n", ld.x6_sz);  in emulate_load_int()
795 	setreg(ld.r1, val, 0, regs);  in emulate_load_int()
800 	if (ld.op == 0x5 || ld.m)  in emulate_load_int()
801 		emulate_load_updates(ld.op == 0x5 ? UPD_IMMEDIATE: UPD_REG, ld, regs, ifa);  in emulate_load_int()
878 	if (ld.x6_op == 0x5 || ld.x6_op == 0xa)  in emulate_load_int()
884 	if (ld.x6_op == 0x2)  in emulate_load_int()
885 		invala_gr(ld.r1);  in emulate_load_int()
891 emulate_store_int (unsigned long ifa, load_store_t ld, struct pt_regs *regs,  in emulate_store_int()  argument
895 	unsigned int len = 1 << ld.x6_sz;  in emulate_store_int()
903 	getreg(ld.imm, &r2, NULL, regs);  in emulate_store_int()
916 		DPRINT("unknown size: x6=%d\n", ld.x6_sz);  in emulate_store_int()
931 	if (ld.op == 0x5) {  in emulate_store_int()
937 		imm = ld.x << 7 | ld.r1;  in emulate_store_int()
941 		if (ld.m) imm |= SIGN_EXT9;  in emulate_store_int()
949 		setreg(ld.r3, ifa, 0, regs);  in emulate_store_int()
960 	if (ld.x6_op == 0xd)  in emulate_store_int()
1041 emulate_load_floatpair (unsigned long ifa, load_store_t ld, struct pt_regs *regs, bool kernel_mode)  in emulate_load_floatpair()  argument
1045 	unsigned long len = float_fsz[ld.x6_sz];  in emulate_load_floatpair()
1065 	if (ld.x6_op != 0x2) {  in emulate_load_floatpair()
1074 		DPRINT("ld.r1=%d ld.imm=%d x6_sz=%d\n", ld.r1, ld.imm, ld.x6_sz);  in emulate_load_floatpair()
1080 		switch( ld.x6_sz ) {  in emulate_load_floatpair()
1106 		setfpreg(ld.r1, &fpr_final[0], regs);  in emulate_load_floatpair()
1107 		setfpreg(ld.imm, &fpr_final[1], regs);  in emulate_load_floatpair()
1114 	if (ld.m) {  in emulate_load_floatpair()
1127 		if (ld.x6_op == 1 || ld.x6_op == 3)  in emulate_load_floatpair()
1131 		setreg(ld.r3, ifa, 0, regs);  in emulate_load_floatpair()
1137 	if (ld.x6_op == 0x2) {  in emulate_load_floatpair()
1138 		invala_fr(ld.r1);  in emulate_load_floatpair()
1139 		invala_fr(ld.imm);  in emulate_load_floatpair()
1146 emulate_load_float (unsigned long ifa, load_store_t ld, struct pt_regs *regs,  in emulate_load_float()  argument
1151 	unsigned long len = float_fsz[ld.x6_sz];  in emulate_load_float()
1172 	if (ld.x6_op != 0x2) {  in emulate_load_float()
1176 		DPRINT("ld.r1=%d x6_sz=%d\n", ld.r1, ld.x6_sz);  in emulate_load_float()
1181 		switch( ld.x6_sz ) {  in emulate_load_float()
1203 		setfpreg(ld.r1, &fpr_final, regs);  in emulate_load_float()
1209 	if (ld.op == 0x7 || ld.m)  in emulate_load_float()
1210 		emulate_load_updates(ld.op == 0x7 ? UPD_IMMEDIATE: UPD_REG, ld, regs, ifa);  in emulate_load_float()
1215 	if (ld.x6_op == 0x2)  in emulate_load_float()
1216 		invala_fr(ld.r1);  in emulate_load_float()
1223 emulate_store_float (unsigned long ifa, load_store_t ld, struct pt_regs *regs,  in emulate_store_float()  argument
1228 	unsigned long len = float_fsz[ld.x6_sz];  in emulate_store_float()
1242 	getfpreg(ld.imm, &fpr_init, regs);  in emulate_store_float()
1248 	switch( ld.x6_sz ) {  in emulate_store_float()
1262 	DPRINT("ld.r1=%d x6_sz=%d\n", ld.r1, ld.x6_sz);  in emulate_store_float()
1276 	if (ld.op == 0x7) {  in emulate_store_float()
1282 		imm = ld.x << 7 | ld.r1;  in emulate_store_float()
1286 		if (ld.m)  in emulate_store_float()
1295 		setreg(ld.r3, ifa, 0, regs);  in emulate_store_float()