1 // SPDX-License-Identifier: GPL-2.0-only
3  * SMP boot-related support
5  * Copyright (C) 1998-2003, 2005 Hewlett-Packard Co
6  *	David Mosberger-Tang <davidm@hpl.hp.com>
7  * Copyright (C) 2001, 2004-2005 Intel Corp
15  * 02/07/31 David Mosberger <davidm@hpl.hp.com>	Switch over to hotplug-CPU boot-sequence.
21  *						Add multi-threading and multi-core detection
95 #define MASTER	(0)  macro
131 unsigned long ap_wakeup_vector = -1; /* External Int use to wakeup APs */
194 	go[MASTER] = 0;  in sync_master()
199 			while (!go[MASTER])  in sync_master()
201 			go[MASTER] = 0;  in sync_master()
209  * Return the number of cycles by which our itc differs from the itc on the master
210  * (time-keeper) CPU.  A positive number indicates our itc is ahead of the master,
214 get_delta (long *rt, long *master)  in get_delta()  argument
222 		go[MASTER] = 1;  in get_delta()
228 		if (t1 - t0 < best_t1 - best_t0)  in get_delta()
232 	*rt = best_t1 - best_t0;  in get_delta()
233 	*master = best_tm - best_t0;  in get_delta()
239 	return tcenter - best_tm;  in get_delta()
243  * Synchronize ar.itc of the current (slave) CPU with the ar.itc of the MASTER CPU
244  * (normally the time-keeper CPU).  We use a closed loop to eliminate the possibility of
245  * unaccounted-for errors (such as getting a machine check in the middle of a calibration
246  * step).  The basic idea is for the slave to ask the master what itc value it has and to
247  * read its own itc before and after the master responds.  Each iteration gives us three
250  *	slave		master
252  *	t0 ---\
253  *             ---\
254  *		   --->
256  *		   /---
257  *	       /---
258  *	t1 <---
261  * The goal is to adjust the slave's ar.itc such that tm falls exactly half-way between t0
263  * between the slave and the master is symmetric.  Even if the interconnect were
265  * roundtrip latency (t0 - t1).
269  * accurate to within a round-trip time, which is typically in the range of several
275 ia64_sync_itc (unsigned int master)  in ia64_sync_itc()  argument
282 		long master;	/* master's timestamp */  in ia64_sync_itc()  member
283 		long diff;	/* difference between midpoint and master's timestamp */  in ia64_sync_itc()
296 	go[MASTER] = 1;  in ia64_sync_itc()
298 	if (smp_call_function_single(master, sync_master, NULL, 0) < 0) {  in ia64_sync_itc()
299 		printk(KERN_ERR "sync_itc: failed to get attention of CPU %u!\n", master);  in ia64_sync_itc()
303 	while (go[MASTER])  in ia64_sync_itc()
304 		cpu_relax();	/* wait for master to be ready */  in ia64_sync_itc()
317 					adjust_latency += -delta;  in ia64_sync_itc()
318 					adj = -delta + adjust_latency/4;  in ia64_sync_itc()
320 					adj = -delta;  in ia64_sync_itc()
326 			t[i].master = master_time_stamp;  in ia64_sync_itc()
336 		printk("rt=%5ld master=%5ld diff=%5ld adjlat=%5ld\n",  in ia64_sync_itc()
337 		       t[i].rt, t[i].master, t[i].diff, t[i].lat);  in ia64_sync_itc()
341 	       "maxerr %lu cycles)\n", smp_processor_id(), master, delta, rt);  in ia64_sync_itc()
345  * Ideally sets up per-cpu profiling hooks.  Doesn't do much now...
398 		Dprintk("Going to syncup ITC with ITC Master.\n");  in smp_callin()
411 	last_cpuinfo = cpu_data(cpuid - 1);  in smp_callin()
413 	if (last_cpuinfo->itc_freq != this_cpuinfo->itc_freq ||  in smp_callin()
414 	    last_cpuinfo->proc_freq != this_cpuinfo->proc_freq ||  in smp_callin()
415 	    last_cpuinfo->features != this_cpuinfo->features ||  in smp_callin()
416 	    last_cpuinfo->revision != this_cpuinfo->revision ||  in smp_callin()
417 	    last_cpuinfo->family != this_cpuinfo->family ||  in smp_callin()
418 	    last_cpuinfo->archrev != this_cpuinfo->archrev ||  in smp_callin()
419 	    last_cpuinfo->model != this_cpuinfo->model)  in smp_callin()
421 	local_cpu_data->loops_per_jiffy = loops_per_jiffy;  in smp_callin()
424 	 * Allow the master to continue.  in smp_callin()
468 		barrier(); /* Make sure we re-read cpu_callin_map */  in do_boot_cpu()
475 		ia64_cpu_to_sapicid[cpu] = -1;  in do_boot_cpu()
477 		return -EINVAL;  in do_boot_cpu()
502 		ia64_cpu_to_sapicid[cpu] = -1;  in smp_build_cpu_map()
528 	 * Initialize the per-CPU profiling counter/multiplier  in smp_prepare_cpus()
535 	local_cpu_data->loops_per_jiffy = loops_per_jiffy;  in smp_prepare_cpus()
540 	current_thread_info()->cpu = 0;  in smp_prepare_cpus()
579 	if (cpu_data(cpu)->threads_per_core == 1 &&  in remove_siblinginfo()
580 	    cpu_data(cpu)->cores_per_socket == 1) {  in remove_siblinginfo()
606 			 * Now re-target the CPEI to a different processor  in migrate_platform_irqs()
617 			if (data && data->chip) {  in migrate_platform_irqs()
618 				data->chip->irq_disable(data);  in migrate_platform_irqs()
619 				data->chip->irq_set_affinity(data, mask, false);  in migrate_platform_irqs()
620 				data->chip->irq_enable(data);  in migrate_platform_irqs()
621 				printk ("Re-targeting CPEI to cpu %d\n", new_cpei_cpu);  in migrate_platform_irqs()
626 			retval = -EBUSY;  in migrate_platform_irqs()
642 		return (-EBUSY);  in __cpu_disable()
649 		return -EBUSY;  in __cpu_disable()
687 		bogosum += cpu_data(cpu)->loops_per_jiffy;  in smp_cpus_done()
699 		if ((cpu_data(cpu)->socket_id == cpu_data(i)->socket_id)) {  in set_cpu_sibling_map()
702 			if (cpu_data(cpu)->core_id == cpu_data(i)->core_id) {  in set_cpu_sibling_map()
719 	if (sapicid == -1)  in __cpu_up()
720 		return -EINVAL;  in __cpu_up()
727 		return -EINVAL;  in __cpu_up()
735 	if (cpu_data(cpu)->threads_per_core == 1 &&  in __cpu_up()
736 	    cpu_data(cpu)->cores_per_socket == 1) {  in __cpu_up()
748  * Assume that CPUs have been discovered by some platform-dependent interface.  For
765 				       ia64_tpa(ap_startup->fp), ia64_tpa(ap_startup->gp), 0, 0, 0, 0);  in init_smp_config()
781 	status = ia64_pal_logical_to_phys(-1, &info);  in identify_siblings()
804 	c->socket_id =  (pltid << 8) | info.overview_ppid;  in identify_siblings()
809 	c->cores_per_socket = info.overview_cpp;  in identify_siblings()
810 	c->threads_per_core = info.overview_tpc;  in identify_siblings()
811 	c->num_log = info.overview_num_log;  in identify_siblings()
813 	c->core_id = info.log1_cid;  in identify_siblings()
814 	c->thread_id = info.log1_tid;  in identify_siblings()
818  * returns non zero, if multi-threading is enabled
821  * even though the processor supports multi-threading.
831 			if ((cpu_data(j)->socket_id == cpu_data(i)->socket_id)) {  in is_multithreading_enabled()
832 				if (cpu_data(j)->core_id == cpu_data(i)->core_id)  in is_multithreading_enabled()