Lines Matching +full:- +full:kvm
1 // SPDX-License-Identifier: GPL-2.0-only
3 * VGIC: KVM DEVICE API
9 #include <kvm/arm_vgic.h>
17 int vgic_check_iorange(struct kvm *kvm, phys_addr_t ioaddr, in vgic_check_iorange() argument
22 return -EEXIST; in vgic_check_iorange()
25 return -EINVAL; in vgic_check_iorange()
28 return -EINVAL; in vgic_check_iorange()
30 if (addr & ~kvm_phys_mask(kvm) || addr + size > kvm_phys_size(kvm)) in vgic_check_iorange()
31 return -E2BIG; in vgic_check_iorange()
36 static int vgic_check_type(struct kvm *kvm, int type_needed) in vgic_check_type() argument
38 if (kvm->arch.vgic.vgic_model != type_needed) in vgic_check_type()
39 return -ENODEV; in vgic_check_type()
44 int kvm_set_legacy_vgic_v2_addr(struct kvm *kvm, struct kvm_arm_device_addr *dev_addr) in kvm_set_legacy_vgic_v2_addr() argument
46 struct vgic_dist *vgic = &kvm->arch.vgic; in kvm_set_legacy_vgic_v2_addr()
49 mutex_lock(&kvm->arch.config_lock); in kvm_set_legacy_vgic_v2_addr()
50 switch (FIELD_GET(KVM_ARM_DEVICE_TYPE_MASK, dev_addr->id)) { in kvm_set_legacy_vgic_v2_addr()
52 r = vgic_check_type(kvm, KVM_DEV_TYPE_ARM_VGIC_V2); in kvm_set_legacy_vgic_v2_addr()
54 r = vgic_check_iorange(kvm, vgic->vgic_dist_base, dev_addr->addr, in kvm_set_legacy_vgic_v2_addr()
57 vgic->vgic_dist_base = dev_addr->addr; in kvm_set_legacy_vgic_v2_addr()
60 r = vgic_check_type(kvm, KVM_DEV_TYPE_ARM_VGIC_V2); in kvm_set_legacy_vgic_v2_addr()
62 r = vgic_check_iorange(kvm, vgic->vgic_cpu_base, dev_addr->addr, in kvm_set_legacy_vgic_v2_addr()
65 vgic->vgic_cpu_base = dev_addr->addr; in kvm_set_legacy_vgic_v2_addr()
68 r = -ENODEV; in kvm_set_legacy_vgic_v2_addr()
71 mutex_unlock(&kvm->arch.config_lock); in kvm_set_legacy_vgic_v2_addr()
77 * kvm_vgic_addr - set or get vgic VM base addresses
78 * @kvm: pointer to the vm struct
91 static int kvm_vgic_addr(struct kvm *kvm, struct kvm_device_attr *attr, bool write) in kvm_vgic_addr() argument
93 u64 __user *uaddr = (u64 __user *)attr->addr; in kvm_vgic_addr()
94 struct vgic_dist *vgic = &kvm->arch.vgic; in kvm_vgic_addr()
101 if (write || attr->attr == KVM_VGIC_V3_ADDR_TYPE_REDIST_REGION) in kvm_vgic_addr()
103 return -EFAULT; in kvm_vgic_addr()
109 mutex_lock(&kvm->slots_lock); in kvm_vgic_addr()
110 switch (attr->attr) { in kvm_vgic_addr()
112 r = vgic_check_type(kvm, KVM_DEV_TYPE_ARM_VGIC_V2); in kvm_vgic_addr()
113 addr_ptr = &vgic->vgic_dist_base; in kvm_vgic_addr()
118 r = vgic_check_type(kvm, KVM_DEV_TYPE_ARM_VGIC_V2); in kvm_vgic_addr()
119 addr_ptr = &vgic->vgic_cpu_base; in kvm_vgic_addr()
124 r = vgic_check_type(kvm, KVM_DEV_TYPE_ARM_VGIC_V3); in kvm_vgic_addr()
125 addr_ptr = &vgic->vgic_dist_base; in kvm_vgic_addr()
132 r = vgic_check_type(kvm, KVM_DEV_TYPE_ARM_VGIC_V3); in kvm_vgic_addr()
136 r = vgic_v3_set_redist_base(kvm, 0, addr, 0); in kvm_vgic_addr()
139 rdreg = list_first_entry_or_null(&vgic->rd_regions, in kvm_vgic_addr()
144 addr_ptr = &rdreg->base; in kvm_vgic_addr()
152 r = vgic_check_type(kvm, KVM_DEV_TYPE_ARM_VGIC_V3); in kvm_vgic_addr()
164 r = -EINVAL; in kvm_vgic_addr()
166 r = vgic_v3_set_redist_base(kvm, index, in kvm_vgic_addr()
171 rdreg = vgic_v3_rdist_region_from_index(kvm, index); in kvm_vgic_addr()
173 r = -ENOENT; in kvm_vgic_addr()
178 addr |= rdreg->base; in kvm_vgic_addr()
179 addr |= (u64)rdreg->count << KVM_VGIC_V3_RDIST_COUNT_SHIFT; in kvm_vgic_addr()
183 r = -ENODEV; in kvm_vgic_addr()
189 mutex_lock(&kvm->arch.config_lock); in kvm_vgic_addr()
191 r = vgic_check_iorange(kvm, *addr_ptr, addr, alignment, size); in kvm_vgic_addr()
197 mutex_unlock(&kvm->arch.config_lock); in kvm_vgic_addr()
200 mutex_unlock(&kvm->slots_lock); in kvm_vgic_addr()
213 switch (attr->group) { in vgic_set_common_attr()
215 r = kvm_vgic_addr(dev->kvm, attr, true); in vgic_set_common_attr()
216 return (r == -ENODEV) ? -ENXIO : r; in vgic_set_common_attr()
218 u32 __user *uaddr = (u32 __user *)(long)attr->addr; in vgic_set_common_attr()
223 return -EFAULT; in vgic_set_common_attr()
227 * - at least 32 SPIs on top of the 16 SGIs and 16 PPIs in vgic_set_common_attr()
228 * - at most 1024 interrupts in vgic_set_common_attr()
229 * - a multiple of 32 interrupts in vgic_set_common_attr()
234 return -EINVAL; in vgic_set_common_attr()
236 mutex_lock(&dev->kvm->arch.config_lock); in vgic_set_common_attr()
238 if (vgic_ready(dev->kvm) || dev->kvm->arch.vgic.nr_spis) in vgic_set_common_attr()
239 ret = -EBUSY; in vgic_set_common_attr()
241 dev->kvm->arch.vgic.nr_spis = in vgic_set_common_attr()
242 val - VGIC_NR_PRIVATE_IRQS; in vgic_set_common_attr()
244 mutex_unlock(&dev->kvm->arch.config_lock); in vgic_set_common_attr()
249 switch (attr->attr) { in vgic_set_common_attr()
251 mutex_lock(&dev->kvm->arch.config_lock); in vgic_set_common_attr()
252 r = vgic_init(dev->kvm); in vgic_set_common_attr()
253 mutex_unlock(&dev->kvm->arch.config_lock); in vgic_set_common_attr()
261 if (vgic_check_type(dev->kvm, KVM_DEV_TYPE_ARM_VGIC_V3)) in vgic_set_common_attr()
262 return -ENXIO; in vgic_set_common_attr()
263 mutex_lock(&dev->kvm->lock); in vgic_set_common_attr()
265 if (!lock_all_vcpus(dev->kvm)) { in vgic_set_common_attr()
266 mutex_unlock(&dev->kvm->lock); in vgic_set_common_attr()
267 return -EBUSY; in vgic_set_common_attr()
270 mutex_lock(&dev->kvm->arch.config_lock); in vgic_set_common_attr()
271 r = vgic_v3_save_pending_tables(dev->kvm); in vgic_set_common_attr()
272 mutex_unlock(&dev->kvm->arch.config_lock); in vgic_set_common_attr()
273 unlock_all_vcpus(dev->kvm); in vgic_set_common_attr()
274 mutex_unlock(&dev->kvm->lock); in vgic_set_common_attr()
281 return -ENXIO; in vgic_set_common_attr()
287 int r = -ENXIO; in vgic_get_common_attr()
289 switch (attr->group) { in vgic_get_common_attr()
291 r = kvm_vgic_addr(dev->kvm, attr, false); in vgic_get_common_attr()
292 return (r == -ENODEV) ? -ENXIO : r; in vgic_get_common_attr()
294 u32 __user *uaddr = (u32 __user *)(long)attr->addr; in vgic_get_common_attr()
296 r = put_user(dev->kvm->arch.vgic.nr_spis + in vgic_get_common_attr()
307 return kvm_vgic_create(dev->kvm, type); in vgic_create()
317 int ret = -ENODEV; in kvm_register_vgic_device()
340 int cpuid = FIELD_GET(KVM_DEV_ARM_VGIC_CPUID_MASK, attr->attr); in vgic_v2_parse_attr()
342 reg_attr->addr = attr->attr & KVM_DEV_ARM_VGIC_OFFSET_MASK; in vgic_v2_parse_attr()
343 reg_attr->vcpu = kvm_get_vcpu_by_id(dev->kvm, cpuid); in vgic_v2_parse_attr()
344 if (!reg_attr->vcpu) in vgic_v2_parse_attr()
345 return -EINVAL; in vgic_v2_parse_attr()
351 * vgic_v2_attr_regs_access - allows user space to access VGIC v2 state
353 * @dev: kvm device handle
354 * @attr: kvm device attribute
361 u32 __user *uaddr = (u32 __user *)(unsigned long)attr->addr; in vgic_v2_attr_regs_access()
377 return -EFAULT; in vgic_v2_attr_regs_access()
379 mutex_lock(&dev->kvm->lock); in vgic_v2_attr_regs_access()
381 if (!lock_all_vcpus(dev->kvm)) { in vgic_v2_attr_regs_access()
382 mutex_unlock(&dev->kvm->lock); in vgic_v2_attr_regs_access()
383 return -EBUSY; in vgic_v2_attr_regs_access()
386 mutex_lock(&dev->kvm->arch.config_lock); in vgic_v2_attr_regs_access()
388 ret = vgic_init(dev->kvm); in vgic_v2_attr_regs_access()
392 switch (attr->group) { in vgic_v2_attr_regs_access()
400 ret = -EINVAL; in vgic_v2_attr_regs_access()
405 mutex_unlock(&dev->kvm->arch.config_lock); in vgic_v2_attr_regs_access()
406 unlock_all_vcpus(dev->kvm); in vgic_v2_attr_regs_access()
407 mutex_unlock(&dev->kvm->lock); in vgic_v2_attr_regs_access()
418 switch (attr->group) { in vgic_v2_set_attr()
430 switch (attr->group) { in vgic_v2_get_attr()
442 switch (attr->group) { in vgic_v2_has_attr()
444 switch (attr->attr) { in vgic_v2_has_attr()
456 switch (attr->attr) { in vgic_v2_has_attr()
461 return -ENXIO; in vgic_v2_has_attr()
465 .name = "kvm-arm-vgic-v2",
482 if (attr->group != KVM_DEV_ARM_VGIC_GRP_DIST_REGS) { in vgic_v3_parse_attr()
483 vgic_mpidr = (attr->attr & KVM_DEV_ARM_VGIC_V3_MPIDR_MASK) >> in vgic_v3_parse_attr()
487 reg_attr->vcpu = kvm_mpidr_to_vcpu(dev->kvm, mpidr_reg); in vgic_v3_parse_attr()
489 reg_attr->vcpu = kvm_get_vcpu(dev->kvm, 0); in vgic_v3_parse_attr()
492 if (!reg_attr->vcpu) in vgic_v3_parse_attr()
493 return -EINVAL; in vgic_v3_parse_attr()
495 reg_attr->addr = attr->attr & KVM_DEV_ARM_VGIC_OFFSET_MASK; in vgic_v3_parse_attr()
501 * vgic_v3_attr_regs_access - allows user space to access VGIC v3 state
503 * @dev: kvm device handle
504 * @attr: kvm device attribute
525 switch (attr->group) { in vgic_v3_attr_regs_access()
535 u32 __user *uaddr = (u32 __user *)(unsigned long)attr->addr; in vgic_v3_attr_regs_access()
537 return -EFAULT; in vgic_v3_attr_regs_access()
540 mutex_lock(&dev->kvm->lock); in vgic_v3_attr_regs_access()
542 if (!lock_all_vcpus(dev->kvm)) { in vgic_v3_attr_regs_access()
543 mutex_unlock(&dev->kvm->lock); in vgic_v3_attr_regs_access()
544 return -EBUSY; in vgic_v3_attr_regs_access()
547 mutex_lock(&dev->kvm->arch.config_lock); in vgic_v3_attr_regs_access()
549 if (unlikely(!vgic_initialized(dev->kvm))) { in vgic_v3_attr_regs_access()
550 ret = -EBUSY; in vgic_v3_attr_regs_access()
554 switch (attr->group) { in vgic_v3_attr_regs_access()
567 info = (attr->attr & KVM_DEV_ARM_VGIC_LINE_LEVEL_INFO_MASK) >> in vgic_v3_attr_regs_access()
570 intid = attr->attr & in vgic_v3_attr_regs_access()
575 ret = -EINVAL; in vgic_v3_attr_regs_access()
580 ret = -EINVAL; in vgic_v3_attr_regs_access()
585 mutex_unlock(&dev->kvm->arch.config_lock); in vgic_v3_attr_regs_access()
586 unlock_all_vcpus(dev->kvm); in vgic_v3_attr_regs_access()
587 mutex_unlock(&dev->kvm->lock); in vgic_v3_attr_regs_access()
590 u32 __user *uaddr = (u32 __user *)(unsigned long)attr->addr; in vgic_v3_attr_regs_access()
600 switch (attr->group) { in vgic_v3_set_attr()
614 switch (attr->group) { in vgic_v3_get_attr()
628 switch (attr->group) { in vgic_v3_has_attr()
630 switch (attr->attr) { in vgic_v3_has_attr()
644 if (((attr->attr & KVM_DEV_ARM_VGIC_LINE_LEVEL_INFO_MASK) >> in vgic_v3_has_attr()
651 switch (attr->attr) { in vgic_v3_has_attr()
658 return -ENXIO; in vgic_v3_has_attr()
662 .name = "kvm-arm-vgic-v3",