Lines Matching refs:FIELD_GET

26 	host_pri_bits = FIELD_GET(ICC_CTLR_EL1_PRI_BITS_MASK, val) + 1;  in set_gic_ctlr()
32 host_id_bits = FIELD_GET(ICC_CTLR_EL1_ID_BITS_MASK, val); in set_gic_ctlr()
38 host_seis = FIELD_GET(ICH_VTR_SEIS_MASK, kvm_vgic_global_state.ich_vtr_el2); in set_gic_ctlr()
39 seis = FIELD_GET(ICC_CTLR_EL1_SEIS_MASK, val); in set_gic_ctlr()
43 host_a3v = FIELD_GET(ICH_VTR_A3V_MASK, kvm_vgic_global_state.ich_vtr_el2); in set_gic_ctlr()
44 a3v = FIELD_GET(ICC_CTLR_EL1_A3V_MASK, val); in set_gic_ctlr()
52 vmcr.cbpr = FIELD_GET(ICC_CTLR_EL1_CBPR_MASK, val); in set_gic_ctlr()
53 vmcr.eoim = FIELD_GET(ICC_CTLR_EL1_EOImode_MASK, val); in set_gic_ctlr()
71 FIELD_GET(ICH_VTR_SEIS_MASK, in get_gic_ctlr()
74 FIELD_GET(ICH_VTR_A3V_MASK, kvm_vgic_global_state.ich_vtr_el2)); in get_gic_ctlr()
93 vmcr.pmr = FIELD_GET(ICC_PMR_EL1_MASK, val); in set_gic_pmr()
116 vmcr.bpr = FIELD_GET(ICC_BPR0_EL1_MASK, val); in set_gic_bpr0()
140 vmcr.abpr = FIELD_GET(ICC_BPR1_EL1_MASK, val); in set_gic_bpr1()
168 vmcr.grpen0 = FIELD_GET(ICC_IGRPEN0_EL1_MASK, val); in set_gic_grpen0()
191 vmcr.grpen1 = FIELD_GET(ICC_IGRPEN1_EL1_MASK, val); in set_gic_grpen1()
203 *val = FIELD_GET(ICC_IGRPEN1_EL1_MASK, vmcr.grpen1); in get_gic_grpen1()
335 return ARM64_SYS_REG(FIELD_GET(KVM_REG_ARM_VGIC_SYSREG_OP0_MASK, attr), in attr_to_id()
336 FIELD_GET(KVM_REG_ARM_VGIC_SYSREG_OP1_MASK, attr), in attr_to_id()
337 FIELD_GET(KVM_REG_ARM_VGIC_SYSREG_CRN_MASK, attr), in attr_to_id()
338 FIELD_GET(KVM_REG_ARM_VGIC_SYSREG_CRM_MASK, attr), in attr_to_id()
339 FIELD_GET(KVM_REG_ARM_VGIC_SYSREG_OP2_MASK, attr)); in attr_to_id()