include/asm/mmu_context.h

1 /* SPDX-License-Identifier: GPL-2.0-only */
22 #include <asm/proc-fns.h>
23 #include <asm-generic/mm_hooks.h>
103 	struct mm_struct *mm = current->active_mm;  in cpu_uninstall_idmap()
110 		cpu_switch_mm(mm->pgd, mm);  in cpu_uninstall_idmap()
132  * For a real hibernate/resume/kexec cycle TTBR0 currently points to a zero
133  * page, but TLBs may contain stale ASID-tagged entries (e.g. for EFI runtime
134  * services), while for a userspace-driven test_resume cycle it points to
135  * userspace page tables (and we must point it at a zero page ourselves).
146 	/* avoid cpu_switch_mm() and its SW-PAN and CNP interactions */  in cpu_install_ttbr0()
152  * Atomically replaces the active TTBR1_EL1 PGD with a new VA-compatible PGD,
162 	/* phys_to_ttbr() zeros lower 2 bits of ttbr with 52-bit PA */  in cpu_replace_ttbr1()
207 	atomic64_set(&mm->context.id, 0);  in init_new_context()
208 	refcount_set(&mm->context.pinned, 0);  in init_new_context()
224 		ttbr = phys_to_ttbr(virt_to_phys(mm->pgd)) | ASID(mm) << 48;  in update_saved_ttbr0()
226 	WRITE_ONCE(task_thread_info(tsk)->ttbr0, ttbr);  in update_saved_ttbr0()
241 	 * zero page.  in enter_lazy_tlb()
268 	 * Update the saved TTBR0_EL1 of the scheduled-in task as the previous  in switch_mm()
269 	 * value may have not been initialised yet (activate_mm caller) or the  in switch_mm()
298 	return -1UL >> 8;  in mm_untag_mask()
301 #include <asm-generic/mmu_context.h>