Lines Matching +full:cross +full:- +full:arm64 +full:- +full:system
1 /* SPDX-License-Identifier: GPL-2.0-only */
3 * Copyright (C) 2012,2013 - ARM Ltd
7 * Copyright (C) 2012 - Virtual Open Systems and Columbia University
14 #include <linux/arm-smccc.h>
42 #define KVM_VCPU_VALID_FEATURES (BIT(KVM_VCPU_MAX_FEATURES) - 1)
60 * Mode of operation configurable with kvm-arm.mode early param.
61 * See Documentation/admin-guide/kernel-parameters.txt for more information.
91 *p = mc->head; in push_hyp_memcache()
92 mc->head = to_pa(p); in push_hyp_memcache()
93 mc->nr_pages++; in push_hyp_memcache()
99 phys_addr_t *p = to_va(mc->head); in pop_hyp_memcache()
101 if (!mc->nr_pages) in pop_hyp_memcache()
104 mc->head = *p; in pop_hyp_memcache()
105 mc->nr_pages--; in pop_hyp_memcache()
116 while (mc->nr_pages < min_pages) { in __topup_hyp_memcache()
120 return -ENOMEM; in __topup_hyp_memcache()
132 while (mc->nr_pages) in __free_hyp_memcache()
151 * translation regime that isn't affected by its own stage-2
152 * translation, such as a non-VHE hypervisor running at vEL2, or
154 * canonical stage-2 page tables.
172 * Protected by kvm->slots_lock.
218 /* Protects VM-scoped configuration data */
246 /* VM-wide vCPU feature set */
250 * VM-wide PMU filter, implemented as a bitmap and big enough for
267 * These emulated idregs are VM-wide, but accessed from the context of a vCPU.
270 #define IDREG_IDX(id) (((sys_reg_CRm(id) - 1) << 3) | sys_reg_Op2(id))
271 #define IDREG(kvm, id) ((kvm)->arch.id_regs[IDREG_IDX(id)])
294 SCTLR_EL1, /* System Control Register */
315 MDSCR_EL1, /* Monitor Debug System Control Register */
323 PMEVCNTR0_EL0, /* Event Counter Register (0-30) */
326 PMEVTYPER0_EL0, /* Event Type Register (0-30) */
369 FPEXC32_EL2, /* Floating-Point Exception Control Register */
375 SCTLR_EL2, /* System Control Register (EL2) */
380 HSTR_EL2, /* Hypervisor System Trap Register */
401 CNTHCTL_EL2, /* Counter-timer Hypervisor Control register */
547 /* Self-hosted trace */
590 /* Per-vcpu CCSIDR override or NULL */
595 * Each 'flag' is composed of a comma-separated triplet:
597 * - the flag-set it belongs to in the vcpu->arch structure
598 * - the value for that flag
599 * - the mask for that flag
601 * __vcpu_single_flag() builds such a triplet for a single-bit flag.
612 typeof(v->arch.flagset) *_fset; \
624 READ_ONCE(v->arch.flagset) & (m); \
628 * Note that the set/clear accessors must be preempt-safe in order to
632 /* the nVHE hypervisor is always non-preemptible */
642 typeof(v->arch.flagset) *fset; \
646 fset = &v->arch.flagset; \
656 typeof(v->arch.flagset) *fset; \
660 fset = &v->arch.flagset; \
730 /* vcpu system registers loaded on physical CPU */
732 /* Software step state is Active-pending */
741 #define vcpu_sve_pffr(vcpu) (kern_hyp_va((vcpu)->arch.sve_state) + \
742 sve_ffr_offset((vcpu)->arch.sve_max_vl))
744 #define vcpu_sve_max_vq(vcpu) sve_vq_from_vl((vcpu)->arch.sve_max_vl)
750 if (WARN_ON(!sve_vl_valid((vcpu)->arch.sve_max_vl))) { \
786 #define vcpu_gp_regs(v) (&(v)->arch.ctxt.regs)
792 * for system registers that are never context switched, but only
795 #define __ctxt_sys_reg(c,r) (&(c)->sys_regs[(r)])
799 #define __vcpu_sys_reg(v,r) (ctxt_sys_reg(&(v)->arch.ctxt, (r)))
809 * System registers listed in the switch are not saved on every in __vcpu_read_sys_reg_from_cpu()
815 * thread when emulating cross-VCPU communication. in __vcpu_read_sys_reg_from_cpu()
854 * System registers listed in the switch are not restored on every in __vcpu_write_sys_reg_to_cpu()
927 #define vcpu_has_run_once(vcpu) !!rcu_access_pointer((vcpu)->pid)
1003 * arrived in guest context. For arm64, any event that arrives while a vCPU is
1031 vcpu_arch->steal.base = INVALID_GPA; in kvm_arm_pvtime_vcpu_init()
1036 return (vcpu_arch->steal.base != INVALID_GPA); in kvm_arm_is_pvtime_enabled()
1090 return (!has_vhe() && attr->exclude_host); in kvm_pmu_counter_deferred()
1134 test_bit(KVM_ARCH_FLAG_MTE_ENABLED, &(kvm)->arch.flags))
1141 (test_bit(KVM_ARCH_FLAG_HAS_RAN_ONCE, &(kvm)->arch.flags))