Lines Matching full:macro
37 .macro disable_daif
41 .macro enable_daif
48 .macro save_and_disable_irq, flags
53 .macro restore_irq, flags
57 .macro enable_dbg
61 .macro disable_step_tsk, flgs, tmp
71 .macro enable_step_tsk, flgs, tmp
82 .macro esb
93 .macro csdb
100 .macro clearbhb
107 .macro sb
120 .macro nops, num
134 .macro ventry label
158 * Define a macro that constructs a 64-bit value by concatenating two
163 .macro regs_to_64, rd, lbits, hbits
165 .macro regs_to_64, rd, hbits, lbits
178 .macro adr_l, dst, sym
190 .macro ldr_l, dst, sym, tmp=
206 .macro str_l, src, sym, tmp
215 .macro get_this_cpu_offset, dst
219 .macro get_this_cpu_offset, dst
227 .macro set_this_cpu_offset, src
241 .macro adr_this_cpu, dst, sym, tmp
253 .macro ldr_this_cpu dst, sym, tmp
262 .macro vma_vm_mm, rd, rn
270 .macro read_ctr, reg
296 .macro raw_dcache_line_size, reg, tmp
306 .macro dcache_line_size, reg, tmp
317 .macro raw_icache_line_size, reg, tmp
327 .macro icache_line_size, reg, tmp
337 .macro tcr_set_t0sz, valreg, t0sz
344 .macro tcr_set_t1sz, valreg, t1sz
356 .macro idmap_get_t0sz, reg
370 .macro tcr_compute_pa_size, tcr, pos, tmp0, tmp1
380 .macro __dcache_op_workaround_clean_cache, op, addr
389 * Macro to perform a data cache maintenance for the interval
400 .macro dcache_by_myline_op op, domain, start, end, linesz, tmp, fixup
430 * Macro to perform a data cache maintenance for the interval
440 .macro dcache_by_line_op op, domain, start, end, tmp1, tmp2, fixup
446 * Macro to perform an instruction cache maintenance for the interval
453 .macro invalidate_icache_by_line start, end, tmp1, tmp2, fixup
473 .macro load_ttbr1, pgtbl, tmp1, tmp2
487 .macro break_before_make_ttbr_switch zero_page, page_table, tmp, tmp2
499 .macro reset_pmuserenr_el0, tmpreg
511 .macro reset_amuserenr_el0, tmpreg
521 .macro copy_page dest:req src:req t1:req t2:req t3:req t4:req t5:req t6:req t7:req t8:req
560 .macro le64sym, sym
570 .macro mov_q, reg, val
588 .macro get_current_task, rd
598 .macro offset_ttbr1, ttbr, tmp
615 .macro phys_to_ttbr, ttbr, phys
624 .macro phys_to_pte, pte, phys
637 .macro pte_to_phys, phys, pte
648 .macro tcr_clear_errata_bits, tcr, tmp1, tmp2
668 .macro pre_disable_mmu_workaround
680 .macro frame_push, regcount:req, extra
690 .macro frame_pop
694 .macro __frame_regs, reg1, reg2, op, num
702 .macro __frame, op, regcount, extra=0
741 .macro set_sctlr, sreg, reg
754 .macro set_sctlr_el1, reg
758 .macro set_sctlr_el2, reg
771 .macro cond_yield, lbl:req, tmp:req, tmp2:req
794 .macro bti, targets
802 * This macro emits a program property note section identifying
820 .macro emit_aarch64_feature_1_and, feat=GNU_PROPERTY_AARCH64_FEATURE_1_DEFAULT
846 .macro emit_aarch64_feature_1_and, feat=0
851 .macro __mitigate_spectre_bhb_loop tmp
864 .macro mitigate_spectre_bhb_loop tmp
875 .macro __mitigate_spectre_bhb_fw
888 .macro mitigate_spectre_bhb_clear_insn