Lines Matching full:w1
70 #define W1 v1 macro
139 add h, h, k; /* h + w1 + k => h */ \
191 ld1 {W1.16b}, [RDATA], #16;
199 rev32 XTMP1.16b, W1.16b;
223 ext W1.16b, XTMP0.16b, XTMP0.16b, #4; /* W1: xx, w3, w2, w1 */
244 #define SCHED_W_1_1(round, w0, w1, w2, w3, w4, w5) \ argument
248 #define SCHED_W_1_2(round, w0, w1, w2, w3, w4, w5) \ argument
249 ext XTMP5.16b, w1.16b, w1.16b, #12;
250 #define SCHED_W_1_3(round, w0, w1, w2, w3, w4, w5) \ argument
251 ext XTMP0.16b, XTMP0.16b, w1.16b, #12; /* XTMP0: xx, w2, w1, w0 */
252 #define SCHED_W_1_4(round, w0, w1, w2, w3, w4, w5) \ argument
254 #define SCHED_W_1_5(round, w0, w1, w2, w3, w4, w5) \ argument
258 #define SCHED_W_1_6(round, w0, w1, w2, w3, w4, w5) \ argument
264 #define SCHED_W_1_7(round, w0, w1, w2, w3, w4, w5) \ argument
266 #define SCHED_W_1_8(round, w0, w1, w2, w3, w4, w5) \ argument
268 #define SCHED_W_2_1(round, w0, w1, w2, w3, w4, w5) \ argument
270 #define SCHED_W_2_2(round, w0, w1, w2, w3, w4, w5) \ argument
272 #define SCHED_W_2_3(round, w0, w1, w2, w3, w4, w5) \ argument
276 #define SCHED_W_2_4(round, w0, w1, w2, w3, w4, w5) \ argument
279 #define SCHED_W_2_5(round, w0, w1, w2, w3, w4, w5) \ argument
281 #define SCHED_W_2_6(round, w0, w1, w2, w3, w4, w5) \ argument
283 #define SCHED_W_2_7(round, w0, w1, w2, w3, w4, w5) \ argument
285 #define SCHED_W_2_8(round, w0, w1, w2, w3, w4, w5) \ argument
287 #define SCHED_W_3_1(round, w0, w1, w2, w3, w4, w5) \ argument
289 #define SCHED_W_3_2(round, w0, w1, w2, w3, w4, w5) \ argument
292 #define SCHED_W_3_3(round, w0, w1, w2, w3, w4, w5) \ argument
294 #define SCHED_W_3_4(round, w0, w1, w2, w3, w4, w5) \ argument
296 #define SCHED_W_3_5(round, w0, w1, w2, w3, w4, w5) \ argument
297 /* W1 ^ W2 => XTMP3 */ \
299 #define SCHED_W_3_6(round, w0, w1, w2, w3, w4, w5) argument
300 #define SCHED_W_3_7(round, w0, w1, w2, w3, w4, w5) \ argument
302 #define SCHED_W_3_8(round, w0, w1, w2, w3, w4, w5) argument
305 SCHED_W_1_##iop_num(round, W0, W1, W2, W3, W4, W5)
307 SCHED_W_2_##iop_num(round, W0, W1, W2, W3, W4, W5)
309 SCHED_W_3_##iop_num(round, W0, W1, W2, W3, W4, W5)
312 SCHED_W_1_##iop_num(round, W1, W2, W3, W4, W5, W0)
314 SCHED_W_2_##iop_num(round, W1, W2, W3, W4, W5, W0)
316 SCHED_W_3_##iop_num(round, W1, W2, W3, W4, W5, W0)
319 SCHED_W_1_##iop_num(round, W2, W3, W4, W5, W0, W1)
321 SCHED_W_2_##iop_num(round, W2, W3, W4, W5, W0, W1)
323 SCHED_W_3_##iop_num(round, W2, W3, W4, W5, W0, W1)
326 SCHED_W_1_##iop_num(round, W3, W4, W5, W0, W1, W2)
328 SCHED_W_2_##iop_num(round, W3, W4, W5, W0, W1, W2)
330 SCHED_W_3_##iop_num(round, W3, W4, W5, W0, W1, W2)
333 SCHED_W_1_##iop_num(round, W4, W5, W0, W1, W2, W3)
335 SCHED_W_2_##iop_num(round, W4, W5, W0, W1, W2, W3)
337 SCHED_W_3_##iop_num(round, W4, W5, W0, W1, W2, W3)
340 SCHED_W_1_##iop_num(round, W5, W0, W1, W2, W3, W4)
342 SCHED_W_2_##iop_num(round, W5, W0, W1, W2, W3, W4)
344 SCHED_W_3_##iop_num(round, W5, W0, W1, W2, W3, W4)
539 clear_vec(W1)