Lines Matching refs:T1
14 T1 .req v2
152 trn2 T1.2d, SHASH.2d, HH.2d
153 eor SHASH2.16b, SHASH2.16b, T1.16b
156 trn2 T1.2d, HH3.2d, HH4.2d
157 eor HH34.16b, HH34.16b, T1.16b
175 movi T1.8b, #8
177 eor perm1.16b, perm1.16b, T1.16b
180 ushr T1.2d, perm1.2d, #24
183 sli T1.2d, perm1.2d, #40
189 tbl sh4.16b, {SHASH.16b}, T1.16b
202 eor XM.16b, XM.16b, T1.16b
217 eor XM.16b, XM.16b, T1.16b
222 shl T1.2d, XL.2d, #57
224 eor T2.16b, T2.16b, T1.16b
225 shl T1.2d, XL.2d, #63
226 eor T2.16b, T2.16b, T1.16b
227 ext T1.16b, XL.16b, XH.16b, #8
228 eor T2.16b, T2.16b, T1.16b
248 ld1 {T1.2d}, [x4]
260 rev64 T1.16b, XM3.16b
292 ext IN1.16b, T1.16b, T1.16b, #8
295 eor T1.16b, T1.16b, TT3.16b
298 eor T1.16b, T1.16b, XL.16b
300 pmull2 XM.1q, HH34.2d, T1.2d // (a1 + a0)(b1 + b0)
307 ext T1.16b, XL.16b, XH.16b, #8
319 2: ld1 {T1.2d}, [x2], #16
323 CPU_LE( rev64 T1.16b, T1.16b )
326 ext IN1.16b, T1.16b, T1.16b, #8
327 eor T1.16b, T1.16b, T2.16b
331 eor T1.16b, T1.16b, XL.16b
333 __pmull_\pn XM, T1, SHASH2 // (a1 + a0)(b1 + b0)
336 ext T1.16b, XL.16b, XH.16b, #8
447 trn2 T1.2d, SHASH.2d, HH.2d
448 eor SHASH2.16b, SHASH2.16b, T1.16b
451 trn2 T1.2d, HH3.2d, HH4.2d
452 eor HH34.16b, HH34.16b, T1.16b
496 ld1 {T1.16b}, [x12]
513 tbl INP3.16b, {INP3.16b}, T1.16b
572 6: ld1 {T1.16b-T2.16b}, [x17], #32 // permute vectors
579 tbx INP2.16b, {INP3.16b}, T1.16b
587 tbl INP3.16b, {INP3.16b}, T1.16b
592 ld1 {T1.16b}, [x17]
593 tbl INP3.16b, {INP3.16b}, T1.16b // clear non-data bits
621 rev64 T1.16b, INP0.16b
638 ext T1.16b, T2.16b, T2.16b, #8
650 eor T1.16b, T1.16b, XL.16b
651 ext IN1.16b, T1.16b, T1.16b, #8
654 eor T1.16b, T1.16b, IN1.16b
656 pmull2 XM2.1q, HH34.2d, T1.2d // (a1 + a0)(b1 + b0)
658 ext T1.16b, T2.16b, T2.16b, #8
659 .Lgh3: eor T2.16b, T2.16b, T1.16b
660 pmull2 XH.1q, HH3.2d, T1.2d // a1 * b1
661 pmull XL.1q, HH3.1d, T1.1d // a0 * b0
689 ext T1.16b, XL.16b, XH.16b, #8