dts/xilinx/zynqmp-zc1751-xm019-dc5.dts

1 // SPDX-License-Identifier: GPL-2.0+
3  * dts file for Xilinx ZynqMP zc1751-xm019-dc5
5  * (C) Copyright 2015 - 2021, Xilinx, Inc.
11 /dts-v1/;
14 #include "zynqmp-clk-ccf.dtsi"
15 #include <dt-bindings/gpio/gpio.h>
16 #include <dt-bindings/pinctrl/pinctrl-zynqmp.h>
19 	model = "ZynqMP zc1751-xm019-dc5 RevA";
20 	compatible = "xlnx,zynqmp-zc1751", "xlnx,zynqmp";
33 		stdout-path = "serial0:115200n8";
76 	phy-handle = <&phy0>;
77 	phy-mode = "rgmii-id";
78 	pinctrl-names = "default";
79 	pinctrl-0 = <&pinctrl_gem1_default>;
80 	phy0: ethernet-phy@0 {
91 	pinctrl-names = "default", "gpio";
92 	pinctrl-0 = <&pinctrl_i2c0_default>;
93 	pinctrl-1 = <&pinctrl_i2c0_gpio>;
94 	scl-gpios = <&gpio 74 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>;
95 	sda-gpios = <&gpio 75 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>;
100 	pinctrl-names = "default", "gpio";
101 	pinctrl-0 = <&pinctrl_i2c1_default>;
102 	pinctrl-1 = <&pinctrl_i2c1_gpio>;
103 	scl-gpios = <&gpio 76 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>;
104 	sda-gpios = <&gpio 77 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>;
110 	pinctrl_i2c0_default: i2c0-default {
118 			bias-pull-up;
119 			slew-rate = <SLEW_RATE_SLOW>;
120 			power-source = <IO_STANDARD_LVCMOS18>;
124 	pinctrl_i2c0_gpio: i2c0-gpio {
132 			slew-rate = <SLEW_RATE_SLOW>;
133 			power-source = <IO_STANDARD_LVCMOS18>;
137 	pinctrl_i2c1_default: i2c1-default {
145 			bias-pull-up;
146 			slew-rate = <SLEW_RATE_SLOW>;
147 			power-source = <IO_STANDARD_LVCMOS18>;
151 	pinctrl_i2c1_gpio: i2c1-gpio {
159 			slew-rate = <SLEW_RATE_SLOW>;
160 			power-source = <IO_STANDARD_LVCMOS18>;
164 	pinctrl_uart0_default: uart0-default {
172 			slew-rate = <SLEW_RATE_SLOW>;
173 			power-source = <IO_STANDARD_LVCMOS18>;
176 		conf-rx {
178 			bias-high-impedance;
181 		conf-tx {
183 			bias-disable;
187 	pinctrl_uart1_default: uart1-default {
195 			slew-rate = <SLEW_RATE_SLOW>;
196 			power-source = <IO_STANDARD_LVCMOS18>;
199 		conf-rx {
201 			bias-high-impedance;
204 		conf-tx {
206 			bias-disable;
210 	pinctrl_gem1_default: gem1-default {
218 			slew-rate = <SLEW_RATE_SLOW>;
219 			power-source = <IO_STANDARD_LVCMOS18>;
222 		conf-rx {
225 			bias-high-impedance;
226 			low-power-disable;
229 		conf-tx {
232 			bias-disable;
233 			low-power-enable;
236 		mux-mdio {
241 		conf-mdio {
243 			slew-rate = <SLEW_RATE_SLOW>;
244 			power-source = <IO_STANDARD_LVCMOS18>;
245 			bias-disable;
249 	pinctrl_sdhci0_default: sdhci0-default {
257 			slew-rate = <SLEW_RATE_SLOW>;
258 			power-source = <IO_STANDARD_LVCMOS18>;
259 			bias-disable;
262 		mux-cd {
267 		conf-cd {
269 			bias-high-impedance;
270 			bias-pull-up;
271 			slew-rate = <SLEW_RATE_SLOW>;
272 			power-source = <IO_STANDARD_LVCMOS18>;
275 		mux-wp {
280 		conf-wp {
282 			bias-high-impedance;
283 			bias-pull-up;
284 			slew-rate = <SLEW_RATE_SLOW>;
285 			power-source = <IO_STANDARD_LVCMOS18>;
289 	pinctrl_watchdog0_default: watchdog0-default {
290 		mux-clk {
295 		conf-clk {
297 			bias-pull-up;
300 		mux-rst {
305 		conf-rst {
307 			bias-disable;
308 			slew-rate = <SLEW_RATE_SLOW>;
312 	pinctrl_ttc0_default: ttc0-default {
313 		mux-clk {
318 		conf-clk {
320 			bias-pull-up;
323 		mux-wav {
328 		conf-wav {
330 			bias-disable;
331 			slew-rate = <SLEW_RATE_SLOW>;
335 	pinctrl_ttc1_default: ttc1-default {
336 		mux-clk {
341 		conf-clk {
343 			bias-pull-up;
346 		mux-wav {
351 		conf-wav {
353 			bias-disable;
354 			slew-rate = <SLEW_RATE_SLOW>;
358 	pinctrl_ttc2_default: ttc2-default {
359 		mux-clk {
364 		conf-clk {
366 			bias-pull-up;
369 		mux-wav {
374 		conf-wav {
376 			bias-disable;
377 			slew-rate = <SLEW_RATE_SLOW>;
381 	pinctrl_ttc3_default: ttc3-default {
382 		mux-clk {
387 		conf-clk {
389 			bias-pull-up;
392 		mux-wav {
397 		conf-wav {
399 			bias-disable;
400 			slew-rate = <SLEW_RATE_SLOW>;
407 	pinctrl-names = "default";
408 	pinctrl-0 = <&pinctrl_sdhci0_default>;
409 	no-1-8-v;
410 	xlnx,mio-bank = <0>;
415 	pinctrl-names = "default";
416 	pinctrl-0 = <&pinctrl_ttc0_default>;
421 	pinctrl-names = "default";
422 	pinctrl-0 = <&pinctrl_ttc1_default>;
427 	pinctrl-names = "default";
428 	pinctrl-0 = <&pinctrl_ttc2_default>;
433 	pinctrl-names = "default";
434 	pinctrl-0 = <&pinctrl_ttc3_default>;
439 	pinctrl-names = "default";
440 	pinctrl-0 = <&pinctrl_uart0_default>;
445 	pinctrl-names = "default";
446 	pinctrl-0 = <&pinctrl_uart1_default>;
451 	pinctrl-names = "default";
452 	pinctrl-0 = <&pinctrl_watchdog0_default>;