Lines Matching +full:0 +full:xd00000
48 memory@0 {
50 reg = <0x0 0x0 0x0 0x80000000>, <0x8 0x00000000 0x0 0x80000000>;
59 reg = <0x0 0x7ff00000 0x0 0x100000>;
93 io-channels = <&xilinx_ams 0>, <&xilinx_ams 1>, <&xilinx_ams 2>,
131 &qspi { /* MIO 0-5 - U143 */
133 spi_flash: flash@0 { /* MT25QU512A */
137 reg = <0>;
147 partition@0 {
149 reg = <0x0 0x80000>; /* 512KB */
155 reg = <0x80000 0x80000>; /* 512KB */
161 reg = <0x100000 0x20000>; /* 128KB */
165 reg = <0x120000 0x20000>; /* 128KB */
169 reg = <0x140000 0xC0000>; /* 768KB */
173 reg = <0x200000 0xD00000>; /* 13MB */
177 reg = <0xF00000 0x80000>; /* 512KB */
183 reg = <0xF80000 0xD00000>; /* 13MB */
187 reg = <0x1C80000 0x80000>; /* 512KB */
193 reg = <0x1D00000 0x100000>; /* 1MB */
197 reg = <0x1E00000 0x200000>; /* 2MB */
203 reg = <0x2000000 0x200000>; /* 2MB */
209 reg = <0x2200000 0x20000>; /* 128KB */
213 reg = <0x2220000 0x20000>; /* 128KB */
217 reg = <0x2240000 0x40000>; /* 256B but 256KB sector */
223 reg = <0x2280000 0x20000>; /* 128KB */
227 reg = <0x22A0000 0x1d60000>; /* 29.375 MB */
236 pinctrl-0 = <&pinctrl_sdhci0_default>;
240 xlnx,mio-bank = <0>;
248 tpm@0 { /* slm9670 - U144 */
250 reg = <0>;
262 eeprom: eeprom@50 { /* u46 - also at address 0x58 */
265 reg = <0x50>;
269 eeprom_cc: eeprom@51 { /* required by spec - also at address 0x59 */
272 reg = <0x51>;
275 /* da9062@30 - u170 - also at address 0x31 */
279 reg = <0x33>;
297 reg = <0x32>;
310 * Device acknowledging to addresses 0x5C, 0x5D, 0x70, 0x72, 0x76.
312 * With the FW fix, stdp4320 should respond to address 0x73 only.
320 gpio-line-names = "QSPI_CLK", "QSPI_DQ1", "QSPI_DQ2", "QSPI_DQ3", "QSPI_DQ0", /* 0 - 4 */